25C02
| Model | 25C02 |
| Description | 1K/2K/4K/8K/16K SPI Serial CMOS E2PROM |
| PDF file | Total 10 pages (File size: 63K) |
| Chip Manufacturer | CATALYST |
Advanced Information
CAT25C01/02/04/08/16
1K/2K/4K/8K/16K SPI Serial CMOS E
2
PROM
FEATURES
s
10 MHz SPI Compatible
s
1.8 to 6.0 Volt Operation
s
Hardware and Software Protection
s
Zero Standby Current
s
Low Power CMOS Technology
s
SPI Modes (0,0 & 1,1)
s
Commercial, Industrial and Automotive
s
1,000,000 Program/Erase Cycles
s
100 Year Data Retention
s
Self-Timed Write Cycle
s
8-Pin DIP/SOIC, 8/14-Pin TSSOP and 8-Pin MSOP
s
16/32-Byte Page Write Buffer
s
Block Write Protection
– Protect 1/4, 1/2 or all of E
2
PROM Array
Temperature Ranges
DESCRIPTION
The CAT25C01/02/04/08/16 is a 1K/2K/4K/8K/16K Bit
SPI Serial CMOS E
2
PROM internally organized as
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst’s ad-
vanced CMOS Technology substantially reduces de-
vice power requirements. The CAT25C01/02/04 fea-
tures a 16-byte page write buffer. The 25C08/16 fea-
tures a 32-byte page write buffer.The device operates
via the SPI bus serial interface and is enabled though a
Chip Select (CS). In addition to the Chip Select, the clock
input (SCK), data in (SI) and data out (SO) are required
to access the device. The
HOLD
pin may be used to
suspend any serial communication without resetting the
serial sequence. The CAT25C01/02/04/08/16 is de-
signed with software and hardware write protection
features including Block Write protection. The device is
available in 8-pin DIP, 8-pin SOIC, 8-pin MSOP and 8/
14-pin TSSOP packages.
PIN CONFIGURATION
TSSOP Package (U14)
CS
SO
NC
NC
NC
WP
V
SS
SOIC Package (S)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
DIP Package (P)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
VSS
TSSOP Package (U)
1
2
3
4
8
7
6
5
VCC
HOLD
SCL
SI
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
HOLD
NC
NC
NC
SCK
SI
MSOP Package (R)*
CS
SO
WP
VSS
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
*CAT 25C01/02 only
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
PIN FUNCTIONS
Pin Name
SO
SCK
WP
V
CC
V
SS
CS
SI
HOLD
NC
Function
Serial Data Output
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
CONTROL LOGIC
XDEC
E
2
PROM
ARRAY
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
STATUS
REGISTER
25C128 F02
© 1999 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 25067-00 5/00
