C0402C683K7PAC7867
| Model | C0402C683K7PAC7867 |
| Description | Ceramic Capacitor, Multilayer, Ceramic, 4V, 10% +Tol, 10% -Tol, X5R, -/+15ppm/Cel TC, 0.068uF, 0402, |
| PDF file | Total 18 pages (File size: 890K) |
| Chip Manufacturer | KEMET |
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Terminal Strength
Board Flex
Reference
JIS–C–6429
JIS–C–6429
Test or Inspection Method
Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Appendix 2, Note: 2 mm (min) for all except 3 mm for C0G.
Magnification 50 X. Conditions:
Solderability
J–STD–002
a) Method B, 4 hours @ 155°C, dry heat @ 235°C
b) Method B @ 215°C category 3
c) Method D, category 3 @ 260°C
Temperature Cycling
Biased Humidity
Moisture Resistance
Thermal Shock
High Temperature Life
Storage Life
Mechanical Shock
Resistance to Solvents
JESD22 Method JA–104
MIL–STD–202 Method 103
MIL–STD–202 Method 106
MIL–STD–202 Method 107
MIL–STD–202 Method 108
/EIA–198
MIL–STD–202 Method 108
MIL–STD–202 Method 213
MIL–STD–202 Method 215
1,000 Cycles (-55°C to +125°C), Measurement at 24 hours. +/- 2 hours after test conclusion.
Load Humidity: 1,000 hours 85°C/85% RH and Rated Voltage. Add 100 K ohm resistor.
Measurement at 24 hours. +/- 2 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours. +/- 2 hours after test conclusion.
t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.
Measurement at 24 hours. +/- 2 hours after test conclusion.
-55°C/+125°C. Note: Number of cycles required-300, maximum transfer time-20 seconds, dwell
time-15 minutes. Air-Air.
1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied.
150°C, 0 VDC, for 1,000 hours.
Figure 1 of Method 213, Condition F.
Add aqueous wash chemical, OKEM Clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp, and tape peel force may
increase. KEMET recommends that maximum storage temperature not exceed 40ºC, and maximum storage humidity not exceed 70%
relative humidity. Temperature fluctuations should be minimized to avoid condensation on the parts, and atmospheres should be free of
chlorine and sulfur bearing compounds. For optimized solderability, chip stock should be used promptly, preferably within 1.5 years of
receipt.
Construction
Reference
A
B
C
D
E
Termination
System
Item
Finish
Barrier Layer
Base metal
Inner Electrode
Material
100% Matte Sn
Ni
Cu
Ni
BaTiO
3
Dielectric Material
Note: Image is exaggerated in order to clearly identify all components of construction.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
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