C0504A560G2GAC7246
| Model | C0504A560G2GAC7246 |
| Description | Ceramic Capacitor, Ceramic, 200V, 2% +Tol, 2% -Tol, C0G, -/+30ppm/Cel TC, 0.000056uF, 0504, |
| PDF file | Total 8 pages (File size: 1M) |
| Chip Manufacturer | KEMET |
CERAMIC HIGH RELIABILITY
GENERAL INFORMATION GR900 SERIES
HIGH RELIABILITY — GR900
/ Q-SPEC
GR900 capacitors are intended for use in any application where the
chance of failure must be reduced to the lowest possible level. While
any well-made multilayer ceramic capacitor is an inherently reliable
device, GR900 capacitors receive special attention in all phases of
manufacture including:
•
Raw Materials Selection
•
Clean Room Production
•
Individual Batch Testing
•
C-SAM (when applicable)
•
Singular Batch Identity is Maintained
•
Destructive Physical Analysis
•
These parts are well worth the added investment in comparison to the
cost of a device or system failure.
Typical applications include: Medical, Aerospace, Communication
Satellites, Radar and Guidance Systems.
SCREENING AND SAMPLE TESTS
Each batch receives the following testing/inspections:
In Process Inspection (Per MIL-PRF-123):
1.
2.
100% Visual Inspection.
Destructive Physical Analysis: (DPA) - A sample is pulled from
each lot and examined per EIA-469 and KEMET’s strict internal
void and delamination criteria. Sampling plan is per MIL-PRF-123.
C-SAM (GR900 / “A” in the fifth character position of the ordering
code): May be performed on batches failing to meet the DPA
criteria for removal of marginal product. Not required on each lot.
C-SAM (Q-SPEC / “Q” in the fifth character position of the ordering
code): Receive 100% C-SAM of lot prior to application of end
metallization.
Group A
1. Thermal Shock:
Materials used in the construction of multilayer
ceramic capacitors possess various thermal coefficients of expansion.
To assure maximum uniformity, each part is temperature cycled in
accordance to MIL-STD-202, Method 107, Condition A with Step 3
being 125°C. Number of cycles shall be 20 (100% of lot).
2. Voltage Conditioning:
One of the most strenuous environments for
any capacitor is the high temperature/high voltage test. All units are
subject to twice-rated voltage to the units at the maximum rated
temperature of 125°C for a minimum of 168 hours and a maximum of
264 hours. The voltage conditioning may be terminated at any time
during 168 hours to 264 hours time interval that confirmed failures meet
the requirements of the PDA during the last 48 hours of 1 unit or .4%
(100% of lot).
Optional Voltage Conditioning (Accelerated Voltage
Conditioning):
All conditions of the standard voltage conditioning
apply with the exception of increased voltage and decreased test time.
Refer to MIL-PRF-123 for the proper formula.
*Step 5 is performed on chips at this point (100% of lot).
3. Dielectric Withstanding Voltage:
250% of the DC rated voltage at
25°C (100% of lot).
9. Percent Defective Allowable (PDA):
The overall PDA is 8% for
parts outside the MIL-PRF-123 values. The PDA is per MIL-PRF-
123 for all parts that are valid MIL-PRF-123 values. The PD
includes steps 1 through 8 above with the following exceptions.
Capacitance exclusion - capacitance values no more than 5% or
.5pF, whichever is greater for BX characteristic or 1% or .3pF,
whichever is greater for BP characteristic beyond specified
tolerance limit, shall be removed from the lot but shall not be
considered defective for determination of the PD.
Insulation Resistance at 25°C — Product which is not acceptable
for twice the military limit but is acceptable per the military limit, is
removed from the lot but shall not be considered defective for
determination of the PD.
10. Visual and Mechanical Examination:
Performed per MIL-
PRF-123 criteria.
11. Radiographic Examination (Leaded Devices Only):
Radial
devices receive a one-plane X-ray.
12. Destructive Physical Analysis (DPA):
A sample is examined
on each lot per EIA-469. Sampling Plan is per MIL-PRF-123.
STANDARD PACKAGING
All products are packaged in trays except C512 capacitors which
are packaged 1 piece per bag.
*Note: All packaging is ESD protected.
DATA PACKAGE
A data package is sent with each shipment which contains:
1. Final Destructive Physical Analysis (DPA) report.
2. Certificate of Compliance stating that the parts meet all
applicable requirements of the appropriate military specification to
the best failure level to which KEMET is approved.
3. Summary of Group A Testing.
Group B
MIL-PRF-123 Group B testing is available with special order.
Please contact KEMET for additional information and ordering
details.
4. Insulation Resistance:
The 25°C measurement with rated
voltage applied shall be the lesser of 100 GΩ or 1000 Megohm -
Microfarads (100% of lot).
*5. Insulation Resistance:
The 125°C measurement with rated
voltage applied shall be the lesser of 10 GΩ or 100 Megohm -
Microfarads (100% of lot). For chips, 125°C IR is performed prior to
Step 3 above.
6. Storage
at 150°C for 2 hours minimum without voltage applied
followed by a 12-hour minimum stabilization period (temperature
characteristic BX only).
7. Capacitance:
Shall be within specified tolerance at 25°C (100%
of lot). (Aging phenomenon is taken into account for BX dielectric
to obtain capacitance.)
8. Dissipation Factor:
Shall not exceed 2.5% for X7R (BX)
dielectric, 0.15% for C0G (BP) dielectric at 25°C. (100% of lot.)
3.
12
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
