CS235GN18
| Model | CS235GN18 |
| Description | System Photoelectric Smoke Detector |
| PDF file | Total 6 pages (File size: 151K) |
| Chip Manufacturer | CHERRY |
CS235
CS235
System Photoelectric Smoke Detector
Description
The CS235 System Smoke Detector
is a photo electric type with a
pulsed infrared LED as the light
source and a silicon photodiode as
the light detector. The CS235 IC,
along with passive external compo-
nents, controls the system timing
and signal processing.
Low average current is attained by
pulsing the system once every 10
seconds for 20 milliseconds. Bias is
applied to the signal processing cir-
cuitry for this time interval. During
the second half of the pulse, the last
10 milliseconds, the IR LED is
pulsed and the unit samples for an
alarm level smoke condition. After
the first alarm level signal the sam-
ple rate increases to a two second
interval. After three consecutive
alarm level samples the logic drives
the output latch signalling the sys-
tem panel.
The signal processing circuit blocks
are amplifiers A1 and A2, syn-
chronous detector, voltage com-
parator and the decode counter.
The voltage gain of A2 and the
comparator reference voltage are
set by external resistors.
Additional on-chip features include
an I
CC
current limiter. The current
limiter eliminates power-on false
alarming.
The oscillator controls the IR LED
excitation frequency and provides
drive to the synchronous detector.
The synchronous detection method
has very high noise rejection perfor-
mance.
The internal latch is capable of sink-
ing 100 milliamps maximum and
will clamp the V
CC
pin to 5 volts
when tripped. The latch current is
determined by an external resistor
typically located in the master
panel and is reset by temporary
removal of detector power.
Features
s
Synchronous Detection
for High Noise Immunity
s
Pulsed Operation for Low
Average Current Drain
s
System Gain Externally
Set
s
System Sensitivity
Externally Adjustable
s
System Operation
Monitored by Means of
External Red LED
Package Options
18 Lead PDIP & SOIC Wide
Timer
Pulse Width
1
I
CC
Program
2
18
17
Timer Cap
Block Diagram
INT OSC TIMER PGM
PULSE
LED H.L. V
R
I
CC
V
CC
/
Gnd
BIAS PGM CAP RES
WIDTH
PGM OUT
V
CC
/Output
3
Hi Level GND
4
A1 Input (-)
5
A1 Input (+)
6
LO Level GND
7
A2 Input
8
Timer Period
Program
16
V REG
15
14
LED Output
Oscillator
Program
13
Internal Bias
12
11
NC
Detector Output
Detector
Reference
GATE
POWER
UP
MAIN
TIMER
LED
DRIVER
CURRENT
LIMITER
OUTPUT
LATCH
CLOCK
A2 Output
9
10
OSCILLATOR
GATE BIAS
A1 IN
(-)
A1
A1 IN
(+)
A2
POWER UP BIAS
SET
SYNC
DETECTOR
COMP
COUNTER
¥
Ð3
¥
L.L. A2
GND IN
A2
OUT
NC
DET
OUT
DET
REF
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 7/6/98
1
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Company
