D602
| Model | D602 |
| Description | 3V, 6GHz Divide-by-2 Static Prescaler Final |
| PDF file | Total 8 pages (File size: 291K) |
| Chip Manufacturer | SIGE |
D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Applications
5GHz WLAN, IEEE 802.11a and HIPERLAN
VSAT at 3.6 to 4.2 GHz
Satellite Communications at 4.5 to 4.8 GHz
5 Gbps Clock Generator
Product Description
The D602 is a SiGe divide-by-2 low noise static
prescaler capable of operation up to 6.0 GHz. The
D602 operates over a wide range of input frequencies
and levels, and provides differential outputs for low
noise operation with the common PLL style frequency
synthesizer ICs.
The static nature of the prescaler prevents spurious
generation.
The D602 prescaler can operate from either a single
positive or single negative supply with power down
mode for low standby power consumption.
Features
Low Phase Noise, -141dBc/Hz at 1kHz offset
Single Supply Voltage, 2.7 - 4.0 V
Low Power Consumption, 42mW
Power Down Mode, 0.2µA
Compatible with common PLL synthesizer ICs
8-Pin Plastic SOIC Package
Ordering Information
Type
D602
Package
8-Pin SOIC
Remark
Plastic
Package
Functional Block Diagram
V
CC
PWD
In
f
In
In
÷
2
Out
f
Out
Out
V
EE
V
EE
20-DST-01
Rev 5.0
Sept/01
1 of 8
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