I3K-L67140L-55
| Model | I3K-L67140L-55 |
| Description | Dual-Port SRAM, 1KX8, 55ns, CMOS, PDIP48, 0.600 INCH, PLASTIC, DIP-48 |
| PDF file | Total 16 pages (File size: 196K) |
| Chip Manufacturer | TEMIC |
L67130/L67140
Interface
Pin Configuration
48 PIN DIL (top view), ceramic,
plastic 600 mils
52 PIN PLCC (top view)
48 PIN PLCC (top view)
64 PIN VQFP
(top view)
Block Diagram
Notes :
1. L 67130 (MASTER) : BUSY is open drain output and requires pullup resistor
L 67140 (SLAVE) : BUSY in input
2. Open drain output requires pull-up resistor.
2
MATRA MHS
Rev. D (19 Fev. 97)
