K4E160412D-F6000
| Model | K4E160412D-F6000 |
| Description | EDO DRAM, 4MX4, 60ns, CMOS, PDSO24, TSOP2-26/24 |
| PDF file | Total 21 pages (File size: 257K) |
| Chip Manufacturer | SAMSUNG |
K4E170411D, K4E160411D
K4E170412D, K4E160412D
CMOS DRAM
4M x 4Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 4.194,304 x 4 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of
memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K
Ref.), access time (-50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of
this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh
operation is available in L-version. This 4Mx4 EDO DRAM family is fabricated using Samsung′s advanced CMOS process to realize high
band-width, low power consumption and high reliability. It may be used as main memory unit for high level computer, microcomputer and
personal computer.
FEATURES
•
Part Identification
- K4E170411D-B(F) (5V, 4K Ref.)
- K4E160411D-B(F) (5V, 2K Ref.)
- K4E170412D-B(F) (3.3V, 4K Ref.)
- K4E160412D-B(F) (3.3V, 2K Ref.)
• Extended Data Out Mode operation
(Fast Page Mode with Extended Data Out)
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
Unit : mW
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
2K
605
550
• Single +5V±10% power supply (5V product)
• Single +3.3V±0.3V power supply (3.3V product)
•
Active Power Dissipation
3.3V
4K
-50
-60
324
288
2K
396
360
4K
495
440
5V
Speed
FUNCTIONAL BLOCK DIAGRAM
•
Refresh Cycles
Part
NO.
K4E170411D
K4E170412D
K4E160411D
K4E160412D
V
CC
5V
3.3V
5V
3.3V
2K
32ms
Refresh Control
Refresh Counter
Memory Array
4,194,304 x4
Cells
Refresh Refresh period
cycle
Normal L-ver
4K
64ms
128ms
RAS
CAS
W
Control
Clocks
VBB Generator
Vcc
Vss
Data in
Refresh Timer
Row Decoder
Sense Amps & I/O
Buffer
DQ0
to
DQ3
•
Performance Range
Speed
-50
-60
t
RAC
50ns
60ns
t
CAC
15ns
17ns
t
RC
84ns
104ns
t
HPC
20ns
25ns
Remark
5V/3.3V
5V/3.3V
A0-A11
(A0 - A10)
*1
A0 - A9
(A0 - A10)
*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Data out
Buffer
OE
Note)
*1
: 2K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
