M11L16161SA-45T
Model | M11L16161SA-45T |
Description | EDO DRAM, 1MX16, 45ns, CMOS, PDSO44, TSOP2-50/44 |
PDF file | Total 16 pages (File size: 203K) |
Chip Manufacturer | ESMT |
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CBR REFRESH CYCLE
(A0~A9 ; OE = DON’T CARE)
t
RP
RA S
V
IH
V
IL
M11B16161A / M11B16161SA
M11L16161A / M11L16161SA
t
RAS
t
RP
t
RAS
t
RPC
t
CP
CAS L, C AS H
V
IH
V
IL
t
C SR
t
CHR
t
RPC
t
CSR
t
CHR
I/O
OPE N
t
RC H
WE
V
IH
V
IL
t
RS R
t
RH R
t
R SR
t
RH R
HIDDEN REFRESH CYCLE
( WE = HIGH ; OE = LOW)
(READ)
(REF RESH)
t
R AS
RA S
V
IH
V
IL
t
RP
t
RAS
t
CRP
V
IH
V
IL
t
RC D
t
R SH
t
CHR
CA SL ,C AS H
t
AR
t
RAD
t
ASR
t
RAH
ROW
t
AS C
t
RAL
t
CAH
ADDR
V
IH
V
IL
COLUMN
t
AA
t
RAC
t
CAC
t
CLZ
I/O
V
OH
V
OL
OPE N
VAL ID D ATA
OPE N
NOTE1
t
OFF1
t
O AC
t
ORD
OE
V
IH
V
IL
t
OFF2
D ON' T CAR E
U NDEF IN ED
Note : 1. t
OFF1
is reference from the rising edge of RAS or
CAS
, whichever occurs last.
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2001
Revision
:
1.3
12/16