ML2008IP
| Model | ML2008IP |
| Description | レP Compatible Logarithmic Gain/Attenuator |
| PDF file | Total 11 pages (File size: 159K) |
| Chip Manufacturer | MICRO-LINEAR |
March 1997
ML2008*, ML2009**
µP
Compatible Logarithmic Gain/Attenuator
GENERAL DESCRIPTION
The ML2008 and ML2009 are digitally controlled
logarithmic gain/attenuators with a range of –24 to +24dB
in 0.1dB steps.
Easy interface to microprocessors is provided by an input
latch and control signals consisting of chip select and
write.
The interface for gain setting of the ML2008 is by an 8-bit
data word, while the ML2009 is designed to interface to a
16-bit data bus with a single write operation by hard-
wiring the gain/attenuation pin or LSB pin. The ML2008
can be power downed by the microprocessor utilizing a
bit in the second write operation.
Absolute gain accuracy is 0.05dB max over supply
tolerance of
±10%
and temperature range.
These CMOS logarithmic gain/attenuators are designed for
a wide variety of applications in telecom, audio, sonar or
general purpose function generation.
* This Part Is End Of Life As Of August 1, 2000
** This Part Is Obsolete
FEATURES
s
s
s
s
s
s
s
s
Low noise
Low harmonic distortion
Gain range
Resolution
Flat frequency response
Low supply current
0dBrnc max with +24dB gain
–60dB max
–24 to +24dB
0.1dB steps
±0.05dB
from 0.3-4kHz
±0.10dB
from 0.1-20kHz
4mA max from
±5V
supplies
TTL/CMOS compatible digital interface
ML2008 is designed to interface to an 8-bit data bus;
ML2009 to 16-bit data bus
BLOCK DIAGRAM
ML2008
V
CC
V
SS
GND
AGND
V
CC
V
SS
GND
ML2009*
AGND
+5
V
IN
–5
+
COARSE
–
+
FINE
–
RESISTORS/
SWITCHES
16
DECODERS
8
REGISTER 0
+
BUFFER
–
V
OUT
+5
V
IN
–5
+
COARSE
–
+
FINE
–
RESISTORS/
SWITCHES
16
DECODERS
9
RESISTORS/
SWITCHES
16
+
BUFFER
–
V
OUT
RESISTORS/
SWITCHES
16
1
PDN
1
REGISTER 1
8
WR
CS
A0
WR
CS
REGISTER 0
9
D0–D8
D1–D8
1
