MT28F322D20FH-805B
| Model | MT28F322D20FH-805B |
| Description | FLASH MEMORY |
| PDF file | Total 44 pages (File size: 519K) |
| Chip Manufacturer | MICRON |
2 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
FLASH MEMORY
MT28F322D20
MT28F322D18
Low Voltage, Extended Temperature
0.18µm Process Technology
FEATURES
• Flexible dual-bank architecture
– Support for true concurrent operation with zero
latency
– Read bank
a
during program bank
b
and vice versa
– Read bank
a
during erase bank
b
and vice versa
• Basic configuration:
Seventy-one erasable blocks
– Bank
a
(8Mb for data storage)
– Bank
b
(24Mb for program storage)
• V
CC
, V
CC
Q, V
PP
voltages
– 1.70V (MIN), 1.90V (MAX) V
CC
, V
CC
Q
(MT28F322D18 only)
– 1.80V V
CC
, V
CC
Q (MIN); 2.20V V
CC
(MAX)and 2.25V
V
CC
Q (MAX) (MT28F322D20 only)
– 0.9V (TYP) V
PP
(in-system PROGRAM/ERASE)
– 12V ±5% (HV) V
PP
tolerant (factory programming
compatibility)
• Random access time: 70ns/80ns @ 1.70V V
CC
• Burst Mode read access (MT28F322D20)
– MAX clock rate: 54 MHz (
t
CLK = 18.5ns)
– Burst latency: 70ns @ 1.80V V
CC
and 54 MHz
–
t
ACLK: 17ns @ 1.80V V
CC
and 54 MHz
• Page Mode read access
1
– Eight-word page
– Interpage read access: 70ns/80ns @ 1.80V
– Intrapage read access: 30ns @ 1.80V
• Low power consumption (V
CC
= 2.20V)
– Asynchronous READ < 15mA (MAX)
– Standby < 50µA
– Automatic power saving feature (APS)
• Enhanced write and erase suspend options
– ERASE-SUSPEND-to-READ within same bank
– PROGRAM-SUSPEND-to-READ within same bank
– ERASE-SUSPEND-to-PROGRAM within same bank
• Dual 64-bit chip protection registers for security
purposes
• Cross-compatible command support
– Extended command set
– Common flash interface
• PROGRAM/ERASE cycle
– 100,000 WRITE/ERASE cycles per block
NOTE:
1. Data based on MT28F322D20 device.
2. A “5” in the part mark represents two different
frequencies: 54 MHz (MT28F322D20) or 52 MHz
(MT28F322D18)
2 Meg x 16 Async/Page/Burst Flash Memory
MT28F322D20FH_4.p65 – Rev. 4, Pub. 7/02
BALL ASSIGNMENT
58-Ball FBGA
1
A
B
C
D
E
F
G
A11
2
A8
3
V
SS
4
V
CC
5
V
PP
6
A18
7
A6
8
A4
A12
A9
A20
CLK
RST#
A17
A5
A3
A13
A10
ADV#
WE#
A19
A7
A2
A15
A14
WAIT#
A16
DQ12
WP#
A1
V
CC
Q
DQ15
DQ6
DQ4
DQ2
DQ1
CE#
A0
V
SS
DQ14
DQ13
DQ11
DQ10
DQ9
DQ0
OE#
DQ7
V
SS
Q
DQ5
V
CC
DQ3
V
CC
Q
DQ8
V
SS
Q
Top View
(Ball Down)
NOTE:
See page 7 for Ball Description Table.
See page 43 for mechanical drawing.
OPTIONS
• Timing
70ns access
80ns access
• Frequency
54 MHz
40 MHz
No burst operation
• Boot Block Configuration
Top
Bottom
• Package
58-ball FBGA (8 x 7 ball grid)
• Operating Temperature Range
Extended (-40ºC to +85ºC)
Part Number Example:
MARKING
-70
-80
5
2
4
None
T
B
FH
ET
MT28F322D20FH-804 BET
1
©2002, Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
