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NE552R479A

NE552R479A

Model NE552R479A
Description NECs 3.0 V, 0.25 W L&S-BAND MEDIUM POWER SILICON LD-MOSFET
PDF file Total 9 pages (File size: 498K)
Chip Manufacturer CEL
NEC's 3.0 V, 0.25 W L&S-BAND NE552R479A
MEDIUM POWER SILICON LD-MOSFET
FEATURES
• LOW COST PLASTIC SURFACE MOUNT PACKAGE
• HIGH OUTPUT POWER:
+26 dBm TYP at V
DS
= 3.0 V
• HIGH LINEAR GAIN:
11 dB TYP @ 2.45 GHz
• SINGLE SUPPLY:
2.8 to 6 V
• SURFACE MOUNT PACKAGE:
5.7
x
5.7
x
1.1 mm MAX
5.7 MAX.
0.6±0.15
4.2 MAX.
OUTLINE DIMENSIONS
(Units in mm)
PACKAGE OUTLINE 79A
(Bottom View)
1.5±0.2
Source
Source
W
0X001
Gate
Drain
4.4 MAX.
0.8±0.15
1.0 MAX.
Gate
Drain
1.2 MAX.
A
0.4±0.15
5.7 MAX.
0.2±0.1
0.8 MAX.
3.6±0.2
DESCRIPTION
NEC's NE552R479A is an N-Channel silicon power laterally
diffused MOSFET specially designed as the transmission
power amplifier for mobile and fixed wireless applications.
Die are manufactured using NEC's NEWMOS2 technology
(NEC's 0.6
μm
WSi gate lateral MOSFET) and housed in a
surface mount package.
APPLICATIONS
• DIGITAL CELLULAR PHONES:
3.0 V GSM1900 Pre Driver
• ANALOG CELLULAR PHONES:
2.4 V AMPS Handsets
• OTHERS:
W-LAN
Short Range Wireless
Retail Business Radio
Special Mobile Radio
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C)
PART NUMBER
PACKAGE OUTLINE
Functional
Characteristics
SYMBOLS
P
OUT
G
L
CHARACTERISTICS
Output Power
Linear Gain
Power Added Efficiency
Drain Current
Gate-to-Source Leakage Current
Saturated Drain Current
(Zero Gate Voltage Drain Voltage)
Gate Threshold Voltage
Transconductance
Drain-to-Source Breakdown Voltage
Thermal Resistance
UNITS
dBm
dB
%
A
nA
nA
V
S
V
°C/W
15
1
1.4
0.4
18
10
35
MIN
24.0
NE552R479A
79A
TYP
26.0
11.0
45
230
100
100
1.9
MAX
TEST CONDITIONS
f = 2.45 GHz, V
DS
= 3.0 V,
I
DSQ
= 200 mA (RF OFF)
P
in
= 19 dBm, except
Pin = 10 dBm for linear gain
V
GS
= 5.0 V
V
DS
= 6.0 V
V
DS
= 3.5 V, I
DS
=
1 mA
V
DS
= 3.5 V, I
DS
=
100 mA
I
DSS
= 10
μA
Channel-to-Case
η
ADD
I
D
I
GSS
I
DSS
V
TH
g
m
BV
DSS
R
TH
Notes:
1. DC performance is tested 100%. Several samples per wafer are tested for RF performance. Wafer rejection criteria for standard devices is 1
reject for several samples.
Electrical DC
Characteristics
0.9±0.2
California Eastern Laboratories
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