P0118MA1AA3
| Model | P0118MA1AA3 |
| Description | 0.8A SCRs |
| PDF file | Total 6 pages (File size: 180K) |
| Chip Manufacturer | STMICROELECTRONICS |
P01 Series
Fig. 4:
Relative variation of gate trigger current,
holding current and latching current versus
junction temperature (typical values).
IGT, IH, IL[Tj] / IGT, IH, IL[T] = 25°C
Fig. 5:Relative
variation of holding current versus
gate-cathode resistance (typical values).
IH[Rgk]/IH[Rgk=1k
Ω
]
6
5
4
3
2
1
Tj(°C)
0
-40
Rgk(kΩ)
-20
0
20
40
60
80
100
120
140
Fig. 6:
Relative variation of dV/dt immunity
versus gate-cathode resistance (typical values).
dV/dt[Rgk] / dV/dt[Rgk=1k
Ω
]
Fig. 7:
Relative variation of dV/dt immunity
versus gate-cathode capacitance (typical values).
dV/dt[Cgk] / dV/dt[Rgk=1k
Ω
]
10.0
10
8
6
1.0
4
2
Rgk(kΩ)
Cgk(nF)
0.1
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
0
1
2
3
4
5
6
7
Fig. 8:
Surge peak on-state current versus
number of cycles.
Fig. 9:
Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10 ms, and corresponding value of I²t.
ITSM(A), I
2
t(A
2
s)
ITSM(A)
8
7
tp=10ms
100.0
6
5
4
3
2
1
0
1
10
Repetitive
Tamb=25°C
Non repetitive
Tj initial=25°C
Onecycle
10.0
1.0
Numberofcycles
100
1000
0.1
0.01
0.10
tp(ms)
1.00
10.00
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