U209B
| Model | U209B |
| Description | Monolithic Integrated Feature Phone Circuit |
| PDF file | Total 34 pages (File size: 675K) |
| Chip Manufacturer | ATMEL |
U4090B
DC line interface and supply voltage generation
The DC line interface consists of an electronic inductance
and a dual port output stage, which charges the capacitors
at V
MPS
and V
B
. The value of the equivalent inductance
is given by
L = R
SENSE
@
C
IND
@
(R
DC
@
R
30
) / (R
DC
+ R
30
)In
order to improve the supply during worst case operating
conditions two PNP current sources - I
BOPT
and
I
MPSOPT
- hand an extra amount of current to the supply
voltages, when the NPNs in parallel are unable to conduct
current.
A flowchart for the control of the current sources
(figure 5) shows, how a priority for supply V
MPS
is
achieved.
V
L
10
W
SENSE
R
SENSE
C
IND
10
m
F
IND
R
DC
+
–
–
+
+
–
I
BOPT
< 5 mA
I
MPSOPT
< 5 mA
6.3 V V
MPS
=
3.3 V
V
MP
3.3 V/
2 mA
V
B
470
m
F
30 k
W
R
30
47
m
F
220
m
F
=
V
OFFS
7.0 V
94 8047
Figure 4. DC line interface with electronic inductance and generation of a regulated and an unregulated supply
Y
VSENSE–VMPS>200 mV
VMPS < 6.3 V
N
N
Y
VSENSE–VB>200 mV
N
IMPSOPT = 0
IBOPT = 0
Y
N
VB < 6.3 V
Y
Charge CMPS
(IMPSOPT)
94 8058
Charge CB
(IBOPT)
Reduce IBOPT
(IMPSOPT = 0)
Figure 5. Supply capacitors CMPS and CB are charged with priority on CMPS
8 (34)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. C1, 28-Oct-96
