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Data Sheet
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U209B3

U209B3

Model U209B3
Description Phase Control Circuit - Tacho Applications
PDF file Total 14 pages (File size: 201K)
Chip Manufacturer TEMIC
TELEFUNKEN Semiconductors
95 10272
U209B3/ U209B3–FP
The values of C
5
and C
6
must be such that for the highest
possible input frequency, the maximum output voltage
does V
0
does not exceed 6 V. While C
5
is charging up the
R
i
on Pin 8 is approx. 6 kΩ. To obtain good linearity of the
f/V converter the time constant resulting from R
i
and C
5
should be considerably less (1/5) than the time span of the
negative half cycle for the highest possible input
frequency. The amount of remaining ripple on the output
voltage on Pin 9 is dependent on C
5
, C
6
and the internal
charge amplification.
∆V
o
=
G
i .
V
ch
.
C
5
C
6
V
C3
V
1
2
V
0
t
1
t
t
2
t
3
t
tot
The ripple
∆V
o
can be reduced by using larger values of
C
6
, however, the maximum conversion speed will than
also be reduced.
The value of this capacitor should be chosen to fit the
particular control loop where it is going to be used.
Figure 4. Soft–start
Frequency to Voltage Converter
The internal frequency to voltage converter
(f/V-converter) generates a DC signal on Pin 9 which is
proportional to the rotational speed using an AC signal
from a tacho–generator or a light beam whose frequency
is in turn dependent on the rotational speed. The high
impedance input with a switch–on threshold of typ. –
100 mV gives very reliable operation even when
relatively simple tacho–generators are employed. The
tacho-frequency is given by:
n
f=
n = revolutions per minute
p = number of pulses per revolution
The converter is based on the charge pumping principle.
With each negative half wave of the input signal, a
quantity of charge determined by C
5
is internally
amplified and then integrated by C
6
at the converter
output on Pin 9. The conversion constant is determined
by C
5
, its charging voltage of V
ch
, R
6
(Pin 9) and the
internally adjusted charge amplification G
i
.
k = G
i
.
Control Amplifier
The integrated control amplifier with differential input
compares the set value (Pin 10) with the instantaneous
value on Pin 9 and generates a regulating voltage on the
output Pin 11 (together with external circuitry on Pin 12)
which always tries to hold the real voltage at the value of
the set voltages. The amplifier has a transmittance of typi-
cally 110
mA/V
and a bipolar current source output on Pin
11 which operates with typically
±100
mA.
The
amplification and frequency response are determined by
R
7
, C
7
, C
8
and R
8
(can be left out). For operation as a
power divider, C
4
, C
5
, R
6
, C
6
, R
7
, C
7
, C
8
and R
8
can be
left out. Pin 9 should be connected with Pin 11 and Pin 7
with Pin 2. The phase angle of the triggering pulse can be
adjusted using the voltage on Pin 10. An internal limiting
circuit prevents the voltage on Pin 11 from becoming
more negative than V
13
+ 1 V.
60
p[Hz]
Pulse Output Stage
The pulse output stage is short circuit protected and can
typically deliver currents of 125 mA. For the design of
smaller triggering currents, the function I
GT
= f (R
GT
) has
been given in the data sheets in the appendix.
C
5 .
R
6 .
V
ch
Automatic Retriggering
The automatic retriggering prevents half cycles without
current flow, even if the triacs is turned off earlier e.g. due
to not exactly centred collector (brush lifter) or in the
event of unsuccessful triggering. If it is necessary, another
triggering pulse is generated after a time lapse of
t
PP
= 4.5 t
P
and this is repeated until either the triac fires
or the half cycle finishes.
The analog output voltage is given by
= k
.
f.
V
o
whereas:
V
ch
= 6.7 V
G
i
= 8.3
Rev. A1: 01.09.1995
Preliminary Information
5 (15)
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