U635H256BDK25
| Model | U635H256BDK25 |
| Description | POWER STORE 32K X 8 NVSRAM |
| PDF file | Total 13 pages (File size: 211K) |
| Chip Manufacturer | ETC |
U635H256
PowerStore
32K x 8 nvSRAM
Features
Description
The U635H256 has two separate
modes of operation: SRAM mode
and nonvolatile mode. In SRAM
mode, the memory operates as an
ordinary static RAM. In nonvolatile
operation, data is transferred in
parallel from SRAM to EEPROM or
from EEPROM to SRAM. In this
mode SRAM functions are disab-
led.
The U635H256 is a fast static RAM
(25, 35, 45 ns), with a nonvolatile
electrically
erasable
PROM
(EEPROM) element incorporated
in each static memory cell. The
SRAM can be read and written an
unlimited number of times, while
independent nonvolatile data resi-
des in EEPROM. Data transfers
from the SRAM to the EEPROM
(the STORE operation) take place
automatically upon power down
using charge stored in system
capacitance. Transfers from the
EEPROM to the SRAM (the
RECALL operation) take place
automatically on power up. The
U635H256 combines the high per-
formance and ease of use of a fast
SRAM with nonvolatile data inte-
grity.
STORE cycles also may be initiated
under user control via a software
sequence.
Once a STORE cycle is initiated,
further input or output are disabled
until the cycle is completed.
Because a sequence of addresses
is used for STORE initiation, it is
important that no other read or write
accesses intervene in the sequence
or the sequence will be aborted.
RECALL cycles may also be initia-
ted by a software sequence.
Internally, RECALL is a two step
procedure. First, the SRAM data is
cleared and second, the nonvolatile
information is transferred into the
SRAM cells.
The RECALL operation in no way
alters the data in the EEPROM
cells. The nonvolatile data can be
recalled an unlimited number of
times.
The U635H256 is pin compatible
with standard SRAMs.
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
High-performance CMOS non-
volatile static RAM 32768 x 8 bits
25, 35 and 45 ns Access Times
10, 15 and 20 ns Output Enable
Access Times
I
CC
= 15 mA at 200 ns Cycle Time
Automatic STORE to EEPROM
on Power Down using system
capacitance
Software initiated STORE
Automatic STORE Timing
10
5
STORE cycles to EEPROM
10 years data retention in
EEPROM
Automatic RECALL on Power Up
Software RECALL Initiation
Unlimited RECALL cycles from
EEPROM
Single 5 V
±
10 % Operation
Operating temperature range:
0 to 70
°C
-40 to 85
°C
CECC 90000 Quality Standard
ESD characterization according
MIL STD 883C M3015.7-HB
(classification see IC Code
Numbers)
Packages: PDIP28 (300 mil)
PDIP28 (600 mil)
SOP28 (330 mil)
Pin Configuration
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
PDIP
22
SOP
21
20
19
18
17
16
15
VCC
W
A13
A8
A9
A11
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
Pin Description
Signal Name
A0 - A14
DQ0 - DQ7
E
G
W
VCC
VSS
Signal Description
Address Inputs
Data In/Out
Chip Enable
Output Enable
Write Enable
Power Supply Voltage
Ground
Top View
December 12, 1997
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