V104
| Model | V104 |
| Description | 10 BIT LVDS RECEIVER FOR VIDEO |
| PDF file | Total 11 pages (File size: 207K) |
| Chip Manufacturer | ICS |
V104
10 B
IT
LVDS R
ECEIVER FOR
V
IDEO
PRELIMINARY
AC Timing Diagrams
TTL
Outputs
80%
80%
20%
t
TLH
TTL Output
C
L
= 8 pF
20%
t
THL
TTL Output Load
TTL Outputs
2.0 V
t
RCH
2.0 V 2.0 V
t
RCL
R/F = L
CLK OUT
0.8 V 0.8 V
t
RCP
t
RS
2.0 V
0.8 V
R/F = H
t
RH
2.0 V
0.8 V
Rxn
x = A, B, C, D, E
n = 0, 1, 2, 3, 4, 5, 6
Phase Lock Loop Set Time
3.0 V
VCC
RCLK+/-
2.0 V
PD
t
RPLL
2.0 V
CLKOUT
V104 Datasheet
8
1/12/05
Revision 1.6
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m
