VSC7125QU
| Model | VSC7125QU |
| Description | 1.0625 Gbits/sec Fibre Channel Transceiver |
| PDF file | Total 16 pages (File size: 127K) |
| Chip Manufacturer | VITESSE |
VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC7125
Features
• ANSI X3T11 Fibre Channel Compatible
1.0625 Gbps Full-duplex Transceiver
• 10 Bit TTL Interface for Transmit and
Receive Data
• Monolithic Clock Synthesis and Clock
Recovery - No External Components
1.0625 Gbits/sec Fibre
Channel Transceiver
• 106.25 MHz TTL Reference Clock
• Low Power Operation - 650 mW
• Suitable for Both Coaxial and Optical
Link Applications
• 64 Pin, 10mm or 14mm PQFP
• Single +3.3V Power Supply
General Description
The VSC7125 is a full-speed Fibre Channel Transceiver optimized for Disk Drive and other space con-
strained applications. It accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of REFCLK
and serializes it onto the TX PECL differential outputs at a baud rate which is ten times the REFCLK frequency.
The VSC7125 also samples serial receive data on the RX PECL differential inputs, recovers the clock and data,
deserializes it onto the 10-bit receive data bus, outputs two recovered clocks at one twentieth of the incoming
baud rate and detects Fibre Channel “Comma” characters. The VSC7125 contains on-chip PLL circuitry for
synthesis of the baud-rate transmit clock, and extraction of the clock from the received serial stream. These cir-
cuits are fully monolithic and require no external components.
VSC7125 Block Diagram
EWRAP
R0:9
10
QD
Serial to
Parallel
÷
10
Retimed
Data
Recovered
Clock
QD
Clock
Recovery
2:1
RX+
RX-
RCLK
RCLKN
Frame
Logic
÷
20
Comma
Detect
Resync
COM_DET
EN_CDET
10
T0:9
DQ
Parallel
to Serial
Serial Data
Synthesized
Clock
DQ
TX+
TX-
REFCLK
PLL Clock
Multiply
G52121-0, Rev. 4.1
4/23/98
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
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