W149
| Model | W149 |
| Description | 440BX AGPset Spread Spectrum Frequency Synthesizer |
| PDF file | Total 14 pages (File size: 160K) |
| Chip Manufacturer | CYPRESS |
W149
48-MHz Clock Output (Lump Capacitance Test Load = 20 pF= 66.6/100 MHz
CPU = 66.6/100 MHz
Parameter
f
f
D
m/n
t
R
t
F
t
D
f
ST
Description
Frequency, Actual
PLL Ratio
Output Rise Edge
Rate
Duty Cycle
Frequency Stabiliza-
tion from Power-up
(cold start)
Test Condition/Comments
Determined by PLL divider ratio (see m/n below)
(14.31818 MHz x 57/17 = 48.008 MHz)
Measured from 0.4V to 2.4V
0.5
0.5
45
Min.
Typ.
48.008
+167
57/17
2
2
55
3
V/ns
V/ns
%
ms
Max.
Unit
MHz
ppm
Deviation from 48 MHz (48.008 – 48)/48
Output Fall Edge Rate Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms from
power-up. Short cycles exist prior to frequency stabili-
zation.
Z
o
AC Output Impedance Average value during switching transition. Used for de-
termining series termination value.
40
Ω
24-MHz Clock Output (Lump Capacitance Test Load = 20 pF= 66.6/100 MHz
CPU = 66.6/100 MHz
Parameter
f
f
D
m/n
t
R
t
F
t
D
f
ST
Description
Frequency, Actual
PLL Ratio
Output Fall Edge Rate
Duty Cycle
Frequency Stabiliza-
tion from Power-up
(cold start)
AC Output Impedance
Test Condition/Comments
Determined by PLL divider ratio (see m/n below)
(14.31818 MHz x 57/34 = 24.004 MHz)
0.5
0.5
45
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms from
power-up. Short cycles exist prior to frequency stabili-
zation.
Average value during switching transition. Used for de-
termining series termination value.
40
Min.
Typ.
24.004
+167
57/34
2
2
55
3
V/ns
V/ns
%
ms
Max.
Unit
MHz
ppm
Deviation from 24 MHz (24.004 – 24)/24
Output Rise Edge Rate Measured from 0.4V to 2.4V
Z
o
Ω
Ordering Information
Ordering Code
W149
Document #: 38-00856-A
Package
Name
H
Package Type
48-Pin SSOP (300-mil)
13
