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W164

W164

Model W164
Description Spread Spectrum Desktop/Notebook System Frequency Generator
PDF file Total 11 pages (File size: 140K)
Chip Manufacturer CYPRESS
W164
Writing Data Bytes
Each bit in the data bytes controls a particular device function
except for the “reserved” bits, which must be written as a logic
0. Bits are written MSB (most significant bit) first, which is bit
7.
Table 4
gives the bit formats for registers located in Data
Bytes 3–6.
Table 4. Data Bytes 3–6 Serial Configuration Map
Affected Pin
Bit(s)
Pin No.
Pin Name
--
--
--
--
--
Control Function
SEL_3
SEL_2
SEL_1
SEL_0
Frequency Table
Selection
(Reserved)
Bit 1
0
0
1
1
Bit 0
0
1
0
1
0
--
Refer to
Table 5
Refer to
Table 5
Refer to
Table 5
Frequency Controlled
by external SEL100/
66# pin
Table 1
--
Function (See
Table 6
for function details)
Normal Operation
Test Mode
Spread Spectrum on
All Outputs Three-stated
--
Low
--
--
--
Low
--
Low
Low
Low
Low
--
Low
Low
Low
Low
--
--
Low
--
--
--
Low
Low
--
Active
--
--
--
Active
--
Active
Active
Active
Active
--
Active
Active
Active
Active
--
--
Active
--
--
--
Active
Active
Frequency Controlled
by BYT3 SEL_(3:0)
Table 5
--
Data Byte 3
7
--
6
5
4
3
--
--
--
--
Bit Control
1
--
Default
0
0
0
0
0
Table 5
details additional frequency selections that are avail-
able through the serial data interface.
Table 6
details the select functions for Byte 3, bits 1 and 0.
2
1–0
--
--
--
--
0
00
Data Byte 4
7
6
5
4
3
2
1
0
Data Byte 5
7
6
5
4
3
2
1
0
Data Byte 6
7
6
5
4
3
2
1
0
4
11
10
-
8
7
6
5
--
--
24
--
--
--
27
27
PCI_F
PCI6
PCI5
--
PCI4
PCI3
PCI2
PCI1
--
--
IOAPIC
--
--
--
REF2X
REF2X
Clock Output Disable
Clock Output Disable
Clock Output Disable
(Reserved)
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
(Reserved)
(Reserved)
Clock Output Disable
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
1
1
1
0
1
1
1
1
0
0
1
0
0
0
1
[1]
1
[1]
--
14
--
--
--
21
--
22
--
24/48MHz
--
--
--
CPU1
--
CPU0
(Reserved)
Clock output Disable
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
(Reserved)
Clock Output Disable
0
1
0
0
0
1
0
1
Note:
1. Both Bits 0 and 1 of Byte 6 in
Table 4
must be programmed as the same value.
5
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