W182
| Model | W182 |
| Description | Full Feature Peak Reducing EMI Solution |
| PDF file | Total 8 pages (File size: 128K) |
| Chip Manufacturer | CYPRESS |
W182
Full Feature Peak Reducing EMI Solution
Features
•
Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable output frequency range
• Single 1.25% or 3.75% down or center spread output
• Integrated loop filter components
• Operates with a 3.3 or 5V supply
• Low power CMOS design
• Available in 14-pin SOIC (Small Outline Integrated
Circuit)
Table 1. Modulation Width Selection
SS%
0
1
W182
Output
F
in
≥
F
out
≥
F
in
– 1.25%
F
in
≥
F
out
≥
F
in
– 3.75%
W182-5
Output
F
in
+ 0.625%
≥
F
in
≥
– 0.625%
F
in
+ 1.875%
≥
F
in
≥
–1.875%
Table 2. Frequency Range Selection
FS2
0
0
1
1
FS1
0
1
0
1
Frequency Range
8 MHz
≤
F
IN
≤
10 MHz
10 MHz
≤
F
IN
≤
15 MHz
15 MHz
≤
F
IN
≤
18 MHz
18 MHz
≤
F
IN
≤
28 MHz
Key Specifications
Supply Voltages: ........................................... V
DD
= 3.3V±5%
or V
DD
= 5V±10%
Frequency Range: .............................. 8 MHz
≤
F
in
≤
28 MHz
Cycle to Cycle Jitter: ........................................ 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
Simplified Block Diagram
3.3V or 5.0V
Pin Configuration
SOIC
FS2
CLKIN or X1
NC or X2
GND
GND
SS%
FS1
1
2
3
4
5
6
14
13
12
11
10
9
8
REFOUT
OE#
SSON#
Reset
VDD
VDD
CLKOUT
W182/W182-5
X1
XTAL
Input
X2
W182
Spread Spectrum
Output
(EMI suppressed)
7
3.3V or 5.0V
Oscillator or
Reference Input
W182
Spread Spectrum
Output
(EMI suppressed)
PREMIS is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
June 8, 2000, rev. *A
