W196
| Model | W196 |
| Description | Spread Spectrum FTG for 440BX and VIA Apollo Pro-133 |
| PDF file | Total 11 pages (File size: 141K) |
| Chip Manufacturer | CYPRESS |
PRELIMINARY
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
Parameter
V
DD
, V
IN
T
STG
T
A
T
B
ESD
PROT
Description
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
W196
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
Rating
–0.5 to +7.0
–65 to +150
0 to +70
–55 to +125
2 (min.)
Unit
V
°C
°C
°C
kV
DC Electrical Characteristics:
T
A
= 0°C to +70°C, V
DDQ3
= 3.3V±5%, V
DDQ2
= 2.5V±5%
Parameter
Supply Current
I
DDQ3
I
DDQ3
Logic Inputs
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
V
OH
I
OL
Input Low Voltage
Input High Voltage
Input Low Current
[4]
Input High Current
[4]
Output Low Voltage
Output High Voltage
Output High Voltage
Output Low Current
CPU0:1/IOAPIC
CPU0:1
PCI_F, PCI1:6
IOAPIC
REF2X
48MHz, 24MHz
I
OH
Output High Current
CPU0:1
PCI_F, PCI1:6
IOAPIC
REF2X
48MHz, 24MHz
Crystal Oscillator
V
TH
C
LOAD
C
IN,X1
X1 Input Threshold Voltage
[5]
Load Capacitance, as seen by
External Crystal
[6]
X1 Input Capacitance
[7]
Pin X2 unconnected
V
DDQ3
= 3.3V
1.65
14
28
V
pF
pF
I
OL
= 1 mA
I
OH
= –1 mA
I
OH
= –1 mA
V
OL
= 1.25V
V
OL
= 1.5V
V
OL
= 1.25V
V
OL
= 1.5V
V
OL
= 1.5V
V
OL
= 1.25V
V
OL
= 1.5V
V
OL
= 1.25V
V
OL
= 1.5V
V
OL
= 1.5V
3.1
2.2
45
85
65
110
50
35
60
45
100
50
60
110
90
140
70
50
95
87
130
70
80
140
140
170
90
80
130
140
150
90
GND – 0.3
2.0
0.8
V
DD
+ 0.3
–25
10
50
V
V
µA
µA
mV
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Combined 3.3V Supply Current
Combined 2.5V Supply Current
CPU0:1 =100 MHz
Outputs Loaded
[3]
CPU0:1 =100 MHz
Outputs Loaded
[3]
85
30
mA
mA
Description
Test Condition
Min.
Typ.
Max.
Unit
Clock Outputs
Notes:
3. All clock outputs loaded with maximum lump capacitance test load specified in the AC Electrical Characteristics section.
4. W196 logic inputs have internal pull-up resistors, except SEL100/66# (pull-ups not full CMOS level).
5. X1 input threshold voltage (typical) is V
DD
/2.
6. The W196 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is
14 pF; this includes typical stray capacitance of short PCB traces to crystal.
7. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
7
