W1D128M72R8A-3.75AL-QB2
| Model | W1D128M72R8A-3.75AL-QB2 |
| Description | 128MX8 DDR DRAM MODULE, 0.5ns, DMA240, MO-237, DIMM-240 |
| PDF file | Total 11 pages (File size: 255K) |
| Chip Manufacturer | XILINX |
DDR2-400, 533
Single Rank, x8 Registered SDRAM DIMMs
V
DD
= +1.8V ± 0.1V, V
DD
Q = +1.8V ± 0.1V, V
REF
= V
SS
, f =100MHz, 0°C<T
OPR
<+55°C, V
OUT
(DC) = V
DD
Q/2
Symbol
-5
-3.75
Units
Parameter
DDR2-400
DDR2-533
MIN
MAX
MIN
MAX
Active bank A to Active bank B command tRRD
7.5
-
7.5
-
ns
tCCD
2
2
tCK
CAS
A to
CAS
B command period
Write recovery time
tWR
15
-
15
-
ns
WR+tRP
-
WR+tRP
-
Auto Precharge write recovery + Precharge tDAL
tCK
time
Internal Write to Read command delay
tWTR
10
-
7.5
-
ns
Internal Read to Precharge command delay tRTP
7.5
-
7.5
-
ns
Exit precharge power down to any non-Read tXP
2
-
2
-
tCK
command
Exit Self-Refresh to Read command
tXSRD
200
-
200
-
tCK
tRFC+10
-
tRFC+10
-
Exit Self-Refresh to non-Read command tXSNR
ns
CKE minimum high and low pulse width tCKE
3
-
3
-
tCK
Average periodic refresh interval
tREFI
-
7.8
-
7.8
µs
OCD drive mode output delay
tOIT
0
12
0
12
ns
tIS+tCK
-
tIS+tCK
-
ns
tDELAY
CKE low to
CK,
CK
uncertainty
+tIH
+tIH
Note: These parameters are applicable for all 3 chip manufacturers, Micron, Infineon, and Samsung.
DDR2_RDIMM_1 rank_x8_spec
Rev. 1.0 - December, 04
Wintec Industries, Inc., reserves the right to change datasheets and/or products without any notice.
2004 Wintec Industries, Inc.
8
