W24V04B-85LL
| Model | W24V04B-85LL |
| Description | Standard SRAM, 512KX8, 85ns, CMOS, CSP-36 |
| PDF file | Total 11 pages (File size: 153K) |
| Chip Manufacturer | WINBOND |
Preliminary W24V04
512K
×
8 CMOS STATIC RAM
GENERAL DESCRIPTION
The W24V04 is a normal-speed, very low-power CMOS static RAM organized as 524288
×
8 bits
that operates on a wide voltage range from 2.3V to 2.7V power supply. The W24V04, W24V04-LE
and W24V04-LI, can meet the requirement of various operating temperature. This device is
manufactured using Winbond's high performance CMOS technology.
FEATURES
•
•
•
•
•
•
Low power consumption
Access time: 85 nS
2.3V to 2.7V supply voltage
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
•
•
•
Battery back-up operation capability
Data retention voltage: 1.5V (min.)
Packaged in 32-pin 450 mil SOP, standard
type one TSOP (8 mm
×
20 mm), small type
one TSOP (8 mm
×
13.4 mm) and 36-pin CSP
PIN CONFIGURATIONS
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
BLOCK DIAGRAM
CLK GEN.
V
DD
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
A16
A15
A14
A13
A12
A10
A8
A7
I/O1
:
I/O8
DATA
CNTRL.
CLK
GEN.
I/O CKT.
COLUMN DECODER
R
O
W
D
E
C
O
D
E
R
CORE CELL ARRAY
1024 ROWS
512 X 8 COLUMNS
A18
A17
PRECHARGE CKT.
32-pin
SOP
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
WE
A17
A15
V
DD
A18
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-pin
TSOP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
I/O3
I/O2
I/O1
A0
A1
A2
A3
WE
CS
OE
A11 A9 A6 A5 A4 A3 A2 A1 A0
PIN DESCRIPTION
SYMBOL
A0−A18
I/O1−I/O8
CS
WE
OE
V
DD
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
36-pin CSP TOP VIEW
1
A
B
C
D
E
F
G
H
A0
I/O5
I/O6
V
SS
V
CC
I/O7
I/O8
A9
2
A1
A2
3
NC
WE
NC
4
A3
A4
A5
5
A6
A7
6
A8
I/O1
I/O2
V
CC
V
SS
I/O3
I/O4
A14
OE
A10
A18
CS
A11
A17
A16
A12
A15
A13
-1-
Publication Release Date: January 2000
Revision A1
