W3DG6418V75D2MG
| Model | W3DG6418V75D2MG |
| Description | Synchronous DRAM Module, 16MX64, CMOS, ROHS COMPLIANT, DIMM-168 |
| PDF file | Total 7 pages (File size: 144K) |
| Chip Manufacturer | MICROSEMI |
White Electronic Designs
128MB - 16Mx64, SDRAM UNBUFFERED
FEATURES
PC100 and PC133 compatible
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
Fully synchronous: All signals are registered on the
positive edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3V ± 0.3V Power Supply
168 Pin DIMM JEDEC
•
D2: 30.48mm (1.20")
W3DG6418V-D2
PRELIMINARY*
DESCRIPTION
The W3DG6418V is a 16Mx64 synchronous DRAM
module which consists of eight 16Mx8 SDRAM
components in TSOP II package and one 2K EEPROM
in an 8 Pin TSSOP package for Serial Presence Detect
which are mounted on a 168 Pin DIMM multilayer FR4
Substrate.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
NOTE: Consult factory for availability of:
• RoHS compliant products
• Vendor source control options
• Industrial temperature option
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
DQ8
V
SS
DQ9
DQ10
DQ11
DQ12
DQ13
V
CC
DQ14
DQ15
CB0*
CB1*
Vss
NC
NC
V
CC
WE#
DQM0
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Front
DQM1
CS0#
DNU
V
SS
A0
A2
A4
A6
A8
A10/AP
BA1
V
CC
V
CC
CLK0
V
SS
DNU
CS2#
DQM2
DQM3
DNU
V
CC
NC
NC
CB2*
CB3*
V
SS
DQ16
DQ17
Pin
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Front
DQ18
DQ19
V
CC
DQ20
NC
V
REF
*
CKE1*
V
SS
DQ21
DQ22
DQ23
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
CLK2
NC
WP***
SDA**
SCL**
V
CC
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
DQ40
V
SS
DQ41
DQ42
DQ43
DQ44
DQ45
V
CC
DQ46
DQ47
CB4*
CB5*
V
SS
NC
NC
V
CC
CAS#
DQM4
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
CS1#
RAS#
V
SS
A1
A3
A5
A7
A9
BA0
A11
V
CC
CLK1
A12*
V
SS
CKE0
CS3#*
DQM6
DQM7
A13*
V
CC
NC
NC
CB6*
CB7*
V
SS
DQ48
DQ49
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Back
DQ50
DQ51
V
CC
DQ52
NC
V
REF
*
DNU
V
SS
DQ53
DQ54
DQ55
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
CLK3
NC
SA0**
SA1**
SA2**
V
CC
PIN NAMES
A0 - A11
BA0-1
DQ0-63
CLK0, CLK1,
CLK2, CLK3
CKE0
CS0# - CS2#
RAS#
CAS#
WE#
DQM0-7
V
CC
V
SS
SDA
SCL
DNU
NC
WP
Address input (Multiplexed)
Select Bank
Data Input/Output
Clock input
Clock Enable input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Serial data I/O
Serial clock
Do not use
No Connect
Write Protect
** These pins should be NC in the system which
does not support SPD.
*** WP available on the WED3DG6318V-D2.
March 2006
Rev. 1
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
