W3DG6433V10JD1-S
| Model | W3DG6433V10JD1-S |
| Description | DRAM, |
| PDF file | Total 8 pages (File size: 220K) |
| Chip Manufacturer | WEDC |
White Electronic Designs
256MB – 32Mx64 SDRAM, UNBUFFERED
FEATURES
Burst Mode Operation
Auto and Self Refresh capability
LVTTL compatible inputs and outputs
Serial Presence Detect with EEPROM
Fully synchronous: All signals are registered on the positive
edge of the system clock
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
3.3V± 0.3V Power Supply
144 Pin SO-DIMM JEDEC
• JD1: 31.75 (1.25”)
NOTE: Consult factory for availability of:
• Lead-Free Products
• Vendor source control options
• Industrial temperature option
W3DG6433V-JD1
DESCRIPTION
The W3DG6433V is a 32Mx64 synchronous DRAM module
which consists of four 32Mx16 SDRAM components
in TSOP II package, and one 2Kb EEPROM in an 8
pin TSSOP package for Serial Presence Detect which
are mounted on a 144 pin SO-DIMM multilayer FR4
Substrate.
* This product is subject to change without notice.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
PINOUT
PIN
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
FRONT
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
V
SS
DQMB0
DQMB1
V
CC
A0
A1
A2
V
SS
DQ8
DQ9
DQ10
DQ11
V
CC
DQ12
PIN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
BACK
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
V
SS
DQMB4
DQMB5
V
CC
A3
A4
A5
V
SS
DQ40
DQ41
DQ42
DQ43
V
CC
DQ44
PIN
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
FRONT
DQ13
DQ14
DQ15
V
SS
NC
NC
CLK0
V
CC
RAS#
WE#
CS0#
NC
DNU
V
SS
NC
NC
V
CC
DQ16
DQ17
DQ18
DQ19
V
SS
DQ20
DQ21
PIN
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
BACK
DQ45
DQ46
DQ47
V
SS
NC
NC
CKE0
V
CC
CAS#
NC
A12
NC
NC
V
SS
NC
NC
V
CC
DQ48
DQ49
DQ50
DQ51
V
SS
DQ52
DQ53
PIN
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
BACK
DQ22
DQ23
V
CC
A6
A8
V
SS
A9
A10/AP
V
CC
DQMB2
DQMB3
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
SDA**
V
CC
1
PIN NAMES
A0 – A12
Address Input (Multiplexed)
Select Bank
Data Input/Output
Clock Input
Clock Enable Input
Chip Select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Serial Data I/O
Serial Clock
Do Not Use
No Connect
BACK
DQ54
DQ55
V
CC
A7
BA0
V
SS
BA1
A11
V
CC
DQMB6
DQMB7
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
SCL**
V
CC
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
PIN
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
BA0-1
DQ0-63
CLK0
CKE0
CS0#
RAS#
CAS#
WE#
DQMB0-7
V
CC
V
SS
SDA
SCL
DNU
NC
** These pins should be NC in the system which
does not support SPD.
March 2005
Rev. 4
