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Home > Data Sheet > W3EG2256M72ASSR262JD3IMG
W3EG2256M72ASSR262JD3IMG

W3EG2256M72ASSR262JD3IMG

Model W3EG2256M72ASSR262JD3IMG
Description DRAM,
PDF file Total 14 pages (File size: 262K)
Chip Manufacturer WEDC
White Electronic Designs
W3EG2256M72ASSR-JD3
-AJD3
-BJD3
4GB – 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL
FEATURES
Double-data-rate architecture
DDR200, DDR266, and DDR333
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Dual Rank
Power supply: V
CC
= 2.5V ± 0.2V
JEDEC standard 184 pin DIMM package
• Package height options:
JD3: 30.48mm (1.2"),
AJD3: 28.70mm (1.13")
BJD3: 28.70mm (1.13")
NOTE: Consult factory for availability of:
• RoHS compliant products
• Vendor source control options
• Industrial temperature option
* This product is subject to change without notice.
DESCRIPTION
The W3EG2256M72ASSR is a 2x256Mx72 Double
Data Rate SDRAM memory module based on 1Gb DDR
SDRAM components. The module consists of eighteen
512Mx4 stacks, in 66 pin TSOP packages mounted on
a 184 pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible
on both edges and Burst Lengths allow the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
OPERATING FREQUENCIES
DDR333 @CL=2.5
Clock Speed
CL-t
RCD
-t
RP
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2
133MHz
2-3-3
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
March, 2007
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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