X17256128DD8M
| Model | X17256128DD8M |
| Description | QPRO Family of XC1700D QML Configuration PROMs |
| PDF file | Total 10 pages (File size: 104K) |
| Chip Manufacturer | XILINX |
QPRO Family of XC1700D QML Configuration PROMs
R
AC Characteristics Over Operating Condition When Cascading
(1,2)
RESET/OE
CE
CLK
T
CDF
DATA
Last Bit
T
OCK
CEO
T
OCE
T
OCE
DS027_04_021500
First Bit
T
OOE
XC1736D
XC1765D
Symbol
T
CDF
T
OCK
T
OCE
T
OOE
Description
CLK to data float delay
(3,4)
CLK to CEO delay
(3)
CE to CEO delay
(3)
RESET/OE to CEO delay
(3)
Min
-
-
-
-
Max
50
65
45
40
XC17128D
XC17256D
Min
-
-
-
-
Max
50
30
35
30
Units
ns
ns
ns
ns
Notes:
1. AC test load = 50 pF
2. All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
3. Guaranteed by design, not tested.
4. Float delays are measured with 5 pF AC loads. Transition is measured at ±200mV from steady state active levels.
8
1-800-255-7778
DS070 (v2.1) June 1, 2000
Product Specification
