X22C12DM
| Model | X22C12DM |
| Description | Nonvolatile Static RAM |
| PDF file | Total 12 pages (File size: 63K) |
| Chip Manufacturer | XICOR |
X22C12
1K Bit
X22C12
Nonvolatile Static RAM
DESCRIPTION
256 x 4
FEATURES
•
•
•
•
•
•
•
•
High Performance CMOS
—150ns RAM Access Time
High Reliability
—Store Cycles: 1,000,000
—Data Retention: 100 Years
Low Power Consumption
—Active: 40mA Max.
—Standby: 100
µ
A Max.
Infinite Array Recall, RAM Read and Write Cycles
Nonvolatile Store Inhibit: V
CC
= 3.5V Typical
Fully TTL and CMOS Compatible
JEDEC Standard 18-Pin 300-mil DIP
100% Compatible with X2212
—With Timing Enhancements
The X22C12 is a 256 x 4 CMOS NOVRAM featuring a
high-speed static RAM overlaid bit-for-bit with a non-
volatile E
2
PROM. The NOVRAM design allows data to
be easily transferred from RAM to E
2
PROM (STORE)
and from E
2
PROM to RAM (RECALL). The STORE
operation is completed within 5ms or less and the
RECALL is completed within 1µs.
Xicor NOVRAMs are designed for unlimited write opera-
tions to the RAM, either RECALLs from E
2
PROM or
writes from the host. The X22C12 will reliably endure
1,000,000 STORE cycles. Inherent data retention is
greater than 100 years.
FUNCTIONAL DIAGRAM
PIN CONFIGURATION
PLASTIC DIP
CERDIP
STORE
A7
A4
A3
A2
A1
A0
CS
VSS
STORE
1
2
3
4
5
6
7
8
9
18
17
16
15
X22C12 14
13
12
11
10
VCC
A6
A5
I/O4
I/O3
I/O2
I/01
WE
RECALL
3817 FHD F02
2
NONVOLATILE E PROM
MEMORY ARRAY
A0
A1
A2
A3
A4
STORE
RECALL
I/O1
I/O2
I/O3
I/O4
INPUT
DATA
CONTROL
COLUMN SELECT
CONTROL
LOGIC
VCC
VSS
ROW
SELECT
STATIC RAM
MEMORY ARRAY
ARRAY
RECALL
COLUMN
I/O CIRCUITS
SOIC
A7
A4
A3
A2
A1
A0
CS
VSS
1
2
3
4
5
6
7
8
9
10
X22C12
20
19
18
17
16
15
14
13
12
11
VCC
A6
A5
I/O4
NC
NC
I/O3
I/O2
I/O1
WE
A7
A6
A5
CS
WE
3817 FHD F01
STORE
RECALL
3815 FHD F10.1
© Xicor, Inc. 1991, 1995 Patents Pending
3817-2.4 7/30/96 T0/C0/D1 SH
1
Characteristics subject to change without notice
