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X24257V14AH

X24257V14AH

Model X24257V14AH
Description EEPROM, 32KX8, Serial, CMOS, PDSO14, PLASTIC, TSSOP-14
PDF file Total 21 pages (File size: 94K)
Chip Manufacturer XICOR
Preliminary
256K
X24257
400KHz 2-Wire Serial E
2
PROM with Block Lock
32K x 8Bit
FEATURES
• Save Critical Data with Programmable Block
Lock Protection
—Block Lock (first page, first 2 pages, first 4
pages, first 8 pages, 1/4, 1/2, or all of E
2
PROM
Array)
—Software Write Protection
—Programmable Hardware Write Protect
• In Circuit Programmable ROM Mode
• 400KHz 2-Wire Serial Interface
—Schmitt Trigger Input Noise Suppression
—Output Slope Control for Ground Bounce
Noise Elimination
• Longer Battery Life With Lower Power
—Active Read Current Less Than 1mA
—Active Write Current Less Than 3mA
—Standby Current Less Than 1
µ
A
• 1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V Power
Supply Versions
• 64 Byte Page Write Mode
—Minimizes Total Write Time Per Word
• Internally Organized 32K x 8
• Bidirectional Data Transfer Protocol
• Self-Timed Write Cycle
—Typical Write Cycle Time of 5ms
• High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
• 8-Lead XBGA, 8-Lead SOIC, 14-Lead TSSOP
FUNCTIONAL DIAGRAM
DESCRIPTION
The X24257 is a CMOS Serial E
2
PROM, internally
organized 32K x 8. The device features a serial inter-
face and software protocol allowing operation on a
simple two wire bus.
Three device select inputs (S
0
–S
2
) allow up to eight
devices to share a common two wire bus.
A Write Protect Register at the highest address loca-
tion, FFFFh, provides three write protection features:
Software Write Protect, Block Lock Protect, and Pro-
grammable Hardware Write Protect. The Software
Write Protect feature prevents any nonvolatile writes to
the device until the WEL bit in the Write Protect Regis-
ter is set. The Block Lock Protection feature gives the
user eight array block protect options, set by program-
ming three bits in the Write Protect Register. The Pro-
grammable Hardware Write Protect feature allows the
user to install the device with WP tied to V
CC
, write to
and Block Lock the desired portions of the memory
array in circuit, and then enable the In Circuit Program-
mable ROM Mode by programming the WPEN bit
HIGH in the Write Protect Register. After this, the
Block Locked portions of the array, including the Write
Protect Register itself, are protected from being
erased if WP is high.
DATA REGISTER
SERIAL E
2
PROM DATA
AND ADDRESS (SDA)
SCL
COMMAND
DECODE
AND
CONTROL
LOGIC
BLOCK LOCK AND
WRITE PROTECT
CONTROL LOGIC
S
2
S
1
S
0
WP
WRITE VOLTAGE
CONTROL
PAGE
DECODE
LOGIC
Y DECODE LOGIC
SERIAL E
2
PROM
ARRAY
32K x 8
WRITE
PROTECT
REGISTER
DEVICE
SELECT
LOGIC
©
Xicor, Inc. 2000 Patents Pending
9800-5004.1 1/31/00 EP
Characteristics subject to change without notice.
1 of 21
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