X24641S8I-1.8
| Model | X24641S8I-1.8 |
| Description | 400 KHz 2-Wire Serial E 2 PROM |
| PDF file | Total 13 pages (File size: 69K) |
| Chip Manufacturer | XICOR |
64K
X24641
400 KHz 2-Wire Serial E
2
PROM
DESCRIPTION
8K x 8 Bit
FEATURES
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1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V
Power Supply Operation
Low Power CMOS
—Active Read Current Less Than 1mA
—Active Write Current Less Than 3mA
—Standby Current Less Than 1
µ
A
400KHz Fast Mode 2-Wire Serial Interface
—Down to 1.8V
—Schmitt Trigger Input Noise Suppression
—Output Slope Control for Ground Bounce
Noise Elimination
Internally Organized 8K x 8
32 Byte Page Write Mode
—Minimizes Total Write Time Per Byte
Hardware Write Protect
Bidirectional Data Transfer Protocol
Self-Timed Write Cycle
—Typical Write Cycle Time of 5ms
High Reliability
—Endurance: 1,000,000 Cycles
—Data Retention: 100 Years
8-Lead SOIC
The X24641 is a CMOS Serial E
2
PROM Memory,
internally organized 8K x 8. The device features a
serial interface and software protocol allowing opera-
tion on a simple two wire bus. The bus operates at
400KHz all the way down to 1.8V.
Three device select inputs (S
0
–S
2
) allow up to eight
devices to share a common two wire bus.
Hardware Write Protection is provided through a Write
Protect (WP) input pin on the X24641. When the WP
pin is HIGH, the upper quadrant of the Serial E
2
PROM
array is protected against any nonvolatile write
attempts.
Xicor Serial E
2
PROM Memories are designed and
tested for applications requiring extended endurance.
Inherent data retention is greater than 100 years.
FUNCTIONAL DIAGRAM
SERIAL E
2
PROM DATA
AND ADDRESS (SDA)
DATA REGISTER
Y DECODE LOGIC
COMMAND
DECODE
AND
CONTROL
LOGIC
SCL
PAGE
DECODE
LOGIC
S2
S1
S0
DEVICE
SELECT
LOGIC
WRITE
PROTECT
LOGIC
E
2
PROM
ARRAY
8K x 8
WP
WRITE VOLTAGE
CONTROL
7026 FM 01
©
Xicor, 1995, 1996 Patents Pending
7026 3/27/97 T0/C0/D0 SH
1
Characteristics subject to change without notice
