X24F128P-5
| Model | X24F128P-5 |
| Description | 2-Wire SerialFlash with Block Lock TM Protection |
| PDF file | Total 16 pages (File size: 83K) |
| Chip Manufacturer | XICOR |
A
PPLICATION
N
OTE
A V A I L A B L E
AN84
128K
X24F128
2-Wire SerialFlash with Block Lock
TM
Protection
DESCRIPTION
16K x 8 Bit
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Save Critical Data With Programmable
Block Lock Protection
—Block Lock (0, 1/4, 1/2, or all of E
2
PROM Array)
—Software Program Protection
—Programmable Hardware Program Protect
In Circuit Programmable ROM Mode
Longer Battery Life With Lower Power
—Active Read Current Less Than 1mA
—Active Program Current Less Than 3mA
—Standby Current Less Than 1
µ
A
1.8V to 3.6V or 5V “Univolt” Read and
Program Power Supply Versions
32 Word Sector Program Mode
—Minimizes Total Program Time Per Word
100KHz 2-Wire Serial Interface
Internally Organized 16K x 8
Bidirectional Data Transfer Protocol
Self-Timed Program Cycle
—Typical Program Cycle Time of 5ms
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
8-Lead DIP
16-Lead SOIC
The X24F128 is a CMOS SerialFlash Memory, inter-
nally organized 16K x 8. The device features a serial
interface and software protocol allowing operation on a
simple two wire bus.
Three device select inputs (S
0
–S
2
) allow up to eight
devices to share a common two wire bus.
A Program Protect Register at the address location
FFFFh provides three program protection features:
Software Program Protect, Block Lock Protect, and
Hardware Program Protect. The Software Program
Protect feature prevents any nonvolatile writes to the
device until the PEL bit in the Program Protect
Register is set. The Block Lock Protection feature
allows the user to individually block protect four blocks
of the array by programming two bits in the Program
Protect Register. The Programmable Hardware
Program Protect feature allows the user to install the
device with PP tied to V
CC
, program the entire memory
array in circuit, and then enable the hardware program
protection by programming a PPEN bit in the Program
Protect Register. After this, selected blocks of the
array, including the Program Protect Register itself, are
permanently protected from being erased.
FUNCTIONAL DIAGRAM
SERIALFLASH DATA
AND ADDRESS (SDA)
COMMAND
DECODE
AND
CONTROL
LOGIC
BLOCK LOCK AND
PROGRAM PROTECT
CONTROL LOGIC
S2
S1
S0
DEVICE
SELECT
LOGIC
PROGRAM
PROTECT
REGISTER
DATA REGISTER
Y DECODE LOGIC
SERIALFLASH
ARRAY
16K x 8
4K x 8
SCL
SECTOR
DECODE
LOGIC
4K x 8
8K x 8
PP
PROGRAM VOLTAGE
CONTROL
7012 ILL F01.4
©
Xicor, 1995, 1996 Patents Pending
7012-0.8 11/25/96 T1/C0/D0 SH
1
Characteristics subject to change without notice
