Z0410MF-0AA2
| Model | Z0410MF-0AA2 |
| Description | 4A TRIACS |
| PDF file | Total 6 pages (File size: 58K) |
| Chip Manufacturer | STMICROELECTRONICS |
Z04 Series
Fig. 1:
Maximum power dissipation versus RMS
on-state current (full cycle).
P(W)
7
6
5
4
3
2
1
0
0.0
0.5
1.0
IT(RMS)(A)
1.5
2.0
2.5
3.0
3.5
4.0
Fig. 2:
RMS on-state current versus ambient
temperature (full cycle).
IT(RMS)(A)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Rth(j-a)=Rth(j-l)
Rth(j-a)=100°C/W
Tamb(°C)
0
25
50
75
100
125
Fig. 3:
Relative variation of thermal impedance
junction to ambient versus pulse duration.
Fig. 4:
Relative variation of gate trigger current,
holding current and latching current versus
junction temperature (typical values).
IGT,IH,IL [Tj] / IGT,IH,IL [Tj=25°C]
2.5
2.0
IGT
K=[Zth(j-a)/Rth(j-a)]
1E+0
1E-1
1.5
IH & IL
1E-2
tp(s)
1.0
0.5
Tj(°C)
1E-3
1E-3
1E-2
1E-1
1E+0
1E+1
1E+2 5E+2
0.0
-40
-20
0
20
40
60
80
100
120
140
Fig. 5:
Surge peak on-state current versus
number of cycles.
Fig. 6:
Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10ms, and corresponding value of I²t.
ITSM (A), I²t (A²s)
500
Tj initial=25°C
ITSM(A)
25
20
15
10
5
0
Number of cycles
Repetitive
Tamb=25°C
Non repetitive
Tj initial=25°C
t=20ms
One cycle
100
dI/dt limitation:
20A/µs
ITSM
10
I²t
tp (ms)
1000
1
10
100
1
0.01
0.10
1.00
10.00
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