TMS320F28062PZT C2000 with 90MHz frequency, FPU, 128KB flash memory, 52KB RAM ™ 32-bit MCU

Characteristics of TMS320F28062

Efficient 32-bit CPU (TMS320C28x)

90MHz (11.11ns cycle time)

sixteen × 16 and 32 × 32 Multiplication and Accumulation (MAC) Operations

sixteen × 16 Dual MAC

Harvard Bus Architecture

Continuous operation

Fast interrupt response and handling

Unified Memory Programming Model

Efficient code (using C/C++and assembly language)

Floating Point Unit (FPU)

Native single precision floating-point operations

Programmable Control Law Accelerator (CLA)

32-bit floating-point mathematical accelerator

Code execution independent of the main CPU

Viterbi, Complex Mathematics, CRC Unit (VCU)

Expanded C28x instruction set to support complex multiplication, Viterbi operations, and cyclic redundancy check (CRC)

Embedded memory

Up to 256KB of flash memory

Up to 100KB of random access memory (RAM)

2KB One Time Programmable (OTP) ROM

6-channel direct memory access (DMA)

Low device and system costs

3.3V single power supply

No power sorting required

Integrated power on reset and undervoltage reset

Low power operation mode

No analog support pins

Byte order: Small end byte order

Support for JTAG boundary scanning

IEEE Standard 1149.1-1990 Testing Access Ports and Boundary Scan Architecture

timing

Two internal zero pin oscillators

Chip crystal oscillator/external clock input

Watchdog timer module

Lost clock detection circuit

Peripheral Interrupt Extension (PIE) module that supports all peripheral interrupts

Three 32-bit CPU timers

Advanced Control Peripherals

Up to 8 Enhanced Pulse Width Modulator (ePWM) modules

A total of 16 PWM channels (capable of supporting 8 HRPWM)

Independent 16 bit timer in each module

3 input enhanced capture (eCAP) modules

Up to 4 high-resolution capture (HRCAP) modules

Up to 2 Enhanced Quadrature Encoder Pulse (eQEP) modules

12 bit analog-to-digital converter (ADC) with dual sampling and holding (S/H) function

Up to 3.46 MSPS

Up to 16 channels

On chip temperature sensor

128 bit security keys and locks

Protecting Secure Memory Blocks

Preventing firmware reverse engineering

Serial Port Peripherals

Two Serial Communication Interface (SCI) [UART] modules

Two Serial Peripheral Interface (SPI) modules

An internal integrated circuit (I2C) bus

A multi-channel buffered serial port (McBSP) bus

An Enhanced Controller Area Network (eCAN)

Universal Serial Bus (USB) 2.0 (refer to device comparison table for availability)

Full speed device mode

Full or low speed host mode

Up to 54 independently programmable, multiplexed universal input/output (GPIO) pins with input filtering function

Advanced debugging features

Analysis and breakpoint functionality

Real time debugging through hardware

Packaging Options

80 pin PFP and 100 pin PZP PowerPAD ™ Heat resistant and enhanced thin square flat package (HTQFP)

80 pin PN and 100 pin PZ thin square flat package (LQFP)