I14304EY
| Model | I14304EY |
| Description | Speech Synthesizer With RCDG, 240s, CMOS, PDSO28, 8 X 13.40 MM, LEAD FREE, PLASTIC, TSOP1-28 |
| PDF file | Total 38 pages (File size: 393K) |
| Chip Manufacturer | WINBOND |
ISD4003 SERIES
7.2.2. SPI Diagrams
MOSI
Input Shift Register
(Loaded to Row Counter
A0-A10
only if IAB = 0)
Row Counter
P0-P10
Select Logic
OVF EOM
MISO
Output Shift Register
FIGURE 3: SPI INTERFACE SIMPLIFIED BLOCK DIAGRAM
The following diagram describes the SPI port and the control bits associated with it.
MISO
OVF EOM
LSB
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
0
0
0
MSB
MOSI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
C0
C1
C2
C3
C4
Message Cueing (MC)
Ignore Address Bit (IAB)
Power Up (PU)
Play/Record (P/R)
RUN
FIGURE 4: SPI PORT
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Publication Release Date: October 26, 2005
Revision 1.2
