I1P-L67202V-55
| Model | I1P-L67202V-55 |
| Description | FIFO, 1KX9, 55ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28 |
| PDF file | Total 16 pages (File size: 147K) |
| Chip Manufacturer | TEMIC |
MATRA MHS
L 67201/L 67202
Functional Description
Operating Modes
Single Device Mode
A single L 67201/202 may be used when the application
requirements are for 512/1024 words or less. The
Figure 2. Block Diagram of Single 512
×
9 and 1024
×
9.
HF
(HALF–FULL FLAG)
WRITE
(W)
9
DATA
IN
(I)
(R)
9
READ
L 67201/202 is in a Single Device Configuration when
the Expansion In (XI) control input is grounded (see
Figure 2). In this mode the Half-Full Flag (HF), which is
an active low output, is shared with Expansion Out (XO).
L
67201
67202
Q
DATA
OUT
FULL FLAG (FF)
RESET
(RS)
(EF) EMPTY FLAG
(RT) RETRANSMIT
EXPANSION IN (XI)
Width Expansion Mode
Word width may be increased simply by connecting the
corresponding input control signals of multiple devices.
Status flags (EF, FF and HF) can be detected from any one
device. Figure 3 demonstrates an 18-bit word width by
using two L 67201/202. Any word width can be attained
by adding additional L 67201/202.
Figure 3. Block Diagram of 512 / 1024
×
18 FIFO Memory Used in Width Expansion Mode.
HF
9
DATA
IN
(I)
(R) READ
WRITE
FULL FLAG
RESET
(RS)
9
9
XI
XI
18
(Q) DATA
OUT
Note :
3. Flag detection is accomplished by monitoring the FF, EF and the HF signals on either (any) device used in the width
expansion configuration. Do not connect any output control signals together.
(W)
(FF)
HF
9
18
L
67201/202
L
67201/202
(EF) EMPTY FLAG
(RT) RETRANSMIT
Rev. C (10/11/95)
5
