M1033-16-155.5200T
| Model | M1033-16-155.5200T |
| Description | CLCC-36, Reel |
| PDF file | Total 14 pages (File size: 201K) |
| Chip Manufacturer | IDT |
Integrated
Circuit
Systems, Inc.
M1033/34
VCSO B
ASED
C
LOCK
PLL
WITH
A
UTO
S
WITCH
Preliminary Information
E
LECTRICAL
S
PECIFICATIONS
(
CONTINUED
)
AC Characteristics
Unless stated otherwise, V
CC
= 3.3V +5%,T
A
= 0
o
C to +70
o
C (commercial), T
A
= -40
o
C to +85
o
C (industrial), F
VCSO
= F
OUT
= 150-175MHz,
LVPECL outputs terminated with 50Ω to V
CC
- 2V
Symbol Parameter
Min
DIF_REF0, nDIF_REF0,
DIF_REF1, nDIF_REF1
FOUT, nFOUT
Commercial
Industrial
15
62.5
Typ
Max
700
175
Unit Conditions
F
IN
F
OUT
APR
K
VCO
PLL Loop
Constants
1
R
IN
Input Frequency
Output Frequency
Absolute Pull-Range
of VCSO
VCO Gain
Internal Loop Resistor
MHz
MHz
ppm
ppm
kHz/V
kΩ
kΩ
kHz
dBc/Hz
dBc/Hz
dBc/Hz
Fin=19.44 or
38.88_MHz
Tot. PLL ratio = 8
or 4. See
pg. 3
±
120
±
50
±
200
±
150
200
100
2100
700
Wide Bandwidth
Narrow Bandwidth
BW
VCSO
VCSO Bandwidth
Φ
n
Phase Noise
and Jitter
J(t)
odc
t
R
t
F
Single Side Band
Phase Noise
@
155.52
MHz
Jitter (rms)
@
155.52
MHz
Output Duty Cycle
2
Output Rise Time
2
for
FOUT, nFOUT
Output Fall Time
2
for
FOUT, nFOUT
1
kHz Offset
10
kHz Offset
100
kHz Offset
12
kHz to
20
MHz
45
350
350
-
83
-
113
-
136
0.4
50
450
450
0.6
55
550
550
ps
%
ps
ps
20
%
to
80
%
20
%
to
80
%
Table 11: AC Characteristics
Note 1: Parameters needed for PLL Simulator software; see Table 7, Example External Loop Filter Component Values, on pg. 9.
Note 2: See Parameter Measurement Information on pg. 12.
P
ARAMETER
M
EASUREMENT
I
NFORMATION
Output Rise and Fall Time
Output Duty Cycle
nFOUT
FOUT
V
P
-
P
Clock Output
20%
t
R
20%
t
F
odc =
t
PW
t
PERIOD
t
PW
(Output Pulse Width)
t
PERIOD
80%
80%
Figure 6: Output Rise and Fall Time
Figure 7: Output Duty Cycle
M1033/34 Preliminary Information 0.1
I n t e g r a t e d C i r c u i t S y s t e m s, I n c .
●
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Revised 07Apr2005
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