M11B1644SA-60T
| Model | M11B1644SA-60T |
| Description | EDO DRAM, 4MX4, 60ns, CMOS, PDSO24, TSOP2-26/24 |
| PDF file | Total 16 pages (File size: 200K) |
| Chip Manufacturer | ESMT |
$ %
CBR REFRESH CYCLE
(A0~A10 ; OE = DON’T CARE)
t
RP
RAS
V
IH
V
IL
M11B1644A / M11B1644SA
M11L1644A / M11L1644SA
t
RAS
t
RP
t
RAS
t
R PC
t
CP
CAS
V
IH
V
IL
t
CSR
t
CHR
t
RPC
t
C SR
t
CH R
I/O
OPE N
t
RCH
WE
V
IH
V
IL
t
RSR
t
RHR
t
RSR
t
RHR
HIDDEN REFRESH CYCLE
( WE = HIGH ; OE = LOW)
(READ)
( RE F R ES H )
t
RAS
RAS
V
IH
V
IL
t
RP
t
RAS
t
C RP
CAS
V
IH
V
IL
t
RCD
t
RSH
t
CHR
t
AR
t
RAD
t
AS R
t
RAH
ROW
t
AS C
t
RAL
t
CAH
V
IH
AD DR V
IL
COLUMN
t
AA
t
R AC
t
CAC
t
CLZ
I/O
V
O H
V
O L
OPE N
VA LI D DAT A
OP EN
NOTE1
t
OF F 1
t
O AC
t
O RD
V
IH
OE V
I L
t
OF F2
DON'T CARE
UNDEFINE D
Note : 1. t
OFF1
is reference from the rising edge of RAS or
CAS
, whichever occurs last.
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2001
Revision
:
1.1
12/16
