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Data Sheet
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W161H

W161H

Model W161H
Description Processor Specific Clock Generator, 133MHz, CMOS, PDSO48, 0.300 INCH, MO-118AA, SSOP-48
PDF file Total 10 pages (File size: 115K)
Chip Manufacturer CYPRESS
PRELIMINARY
IOAPIC Clock Output, IOAPIC (Lump Capacitance Test Load = 20 pF)
Parameter
f
t
R
t
F
t
D
f
ST
Description
Frequency
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Frequency Stabilization
from Power-up (cold start)
AC Output Impedance
Note 11
Measured from 0.4V to 2.0V
Measured from 2.0V to 0.4V
Measured on rising and falling edge at 1.25V
Assumes full supply voltage reached within
1 ms from power-up. Short cycles exist prior to
frequency stabilization.
Average value during switching transition. Used
for determining series termination value.
20
1
1
45
Test Condition/Comments
Min
Typ
16.67
4
4
55
3
Max
W161
Unit
MHz
V/ns
V/ns
%
ms
Z
o
Note:
11. IOAPIC clock is CPU/8 for CPU = 133 MHz and CPU/6 for CPU = 100 MHz.
Ordering Information
Ordering Code
W161
Package
Name
H
Package Type
48-pin SSOP (300 mils)
Document #: 38-07162 Rev. **
Page 8 of 10
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