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Home > Data Sheet > J309-TR6-E3
J309-TR6-E3

J309-TR6-E3

Model J309-TR6-E3
Description Transistor
PDF file Total 8 pages (File size: 115K)
Chip Manufacturer VISHAY
J/SST/U308 Series
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−25
V
Gate Current :
(J/SST Prefixes) . . . . . . . . . . . . . . . . . . . . 10 mA
(U Prefix) . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
1
/ ” from case for 10 sec.) . . . . . . . . . . . . . . . . . . . 300_C
Lead Temperature (
16
Storage Temperature :
(J/SST Prefixes) . . . . . . . . . . . . . .
−55
to 150_C
(U Prefix) . . . . . . . . . . . . . . . . . . . .
−65
to 175_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .
−55
to 150_C
Power Dissipation :
(J/SST Prefixes)
a
. . . . . . . . . . . . . . . . . 350 mW
(U Prefix)
b
. . . . . . . . . . . . . . . . . . . . . . . 500 mW
Notes
a. Derate 2.8 mW/_C above 25_C
b. Derate 4 mW/_C above 25_C
SPECIFICATIONS FOR J/SST308, J/SST309 AND J/SST310 (T
A
= 25_C UNLESS NOTED)
Limits
J/SST308
J/SST309
J/SST310
Parameter
Static
Gate-Source
Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Current
b
Gate Reverse Current
Gate Operating Current
Drain-Source On-Resistance
Gate-Source Forward Voltage
Symbol
Test Conditions
Typ
a
Min Max Min
Max Min
Max Unit
V
(BR)GSS
V
GS(off)
I
DSS
I
GSS
I
G
r
DS(on)
V
GS(F)
I
G
=
−1
mA
, V
DS
= 0 V
V
DS
= 10 V, I
D
= 1 nA
V
DS
= 10 V, V
GS
= 0 V
V
GS
=
−15
V, V
DS
= 0 V
T
A
= 125_C
V
DG
= 9 V, I
D
= 10 mA
V
GS
= 0 V, I
D
= 1 mA
I
G
= 10 mA
V
DS
= 0 V
J
−35
−25
−1
12
−6.5
60
−1
−1
−25
−1
12
−4
30
−1
−1
−25
−2
24
−6.5
60
−1
−1
V
V
mA
nA
mA
pA
W
−0.002
−0.001
−15
35
0.7
1
1
1
V
Dynamic
Common-Source
Forward Transconductance
Common-Source
Output Conductance
Common-Source
Input Capacitance
Common Source
Common-Source
Reverse Transfer C
Capacitance
Equivalent Input
Noise Voltage
g
fs
g
os
C
iiss
C
rss
e
n
V
DS
= 10 V, I
D
= 10 mA
f = 1 kHz
J
V
DS
= 10 V
V
GS
=
−10
V
10
f = 1 MHz
V
DS
= 10 V, I
D
= 10 mA
f = 100 Hz
SST
J
SST
14
110
4
4
1.9
1.9
6
nV⁄
√Hz
2.5
2.5
2.5
8
250
5
10
250
5
8
250
5
mS
mS
pF
High Frequency
Common-Gate
Forward Transconductance
Common-Gate
Output Conductance
Common-Gate
Common Gate Power Gain
c
Noise Figure
g
f
fg
g
og
G
pg
NF
f = 105 MHz
f = 450 MHz
f = 105 MHz
V
DS
= 10 V
I
D
= 10 mA
f = 450 MHz
f = 105 MHz
f = 450 MHz
f = 105 MHz
f = 450 MHz
14
13
0.16
0.55
16
11.5
1.5
2.7
NZB
dB
mS
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. Pulse test: PW
v300
ms
duty cycle
v3%.
c. Gain (G
pg
) measured at optimum input noise match.
www.vishay.com
2
Document Number: 70237
S-50149—Rev. H, 24-Jan-05
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