M11L16161SA-50T
| Model | M11L16161SA-50T |
| Description | EDO DRAM, 1MX16, 50ns, CMOS, PDSO44, TSOP2-50/44 |
| PDF file | Total 16 pages (File size: 203K) |
| Chip Manufacturer | ESMT |
$ %
t
R AS C
RAS
V
IH
V
IL
M11B16161A / M11B16161SA
M11L16161A / M11L16161SA
EDO-PAGE-MODE EARLY-WRITE CYCLE
t
RP
t
CSH
t
CRP
CA SL,C ASH
V
IH
V
IL
t
RC D
t
C A S ,
t
C L CH
t
PC
(NOTE1)
t
C A S ,
t
C L CH
t
CP
t
CP
t
RSH
t
C AS ,
t
C L C H
t
CP
t
AR
t
R AD
t
ASR
AD DR
V
IH
V
IL
t
RAH
t
ASC
t
A CH
t
C AH
t
ACH
t
ASC
t
C AH
t
ASC
t
ACH
t
R AL
t
CAH
ROW
ROW
COLUMN
COLUMN
COL U MN
t
CWL
t
WCS
t
WCH
t
WP
t
WCS
t
CWL
t
WCH
t
WP
t
WCS
t
CWL
t
WCH
t
WP
WE
V
IH
V
IL
t
DS
I/ O
V
IH
V
IL
t
WCR
t
DH R
t
DH
t
RWL
t
DS
t
DH
t
DS
t
DH
V AL I D D AT A
VALI D DATA
V AL I D D AT A
OE
V
IH
V
IL
EDO-PAGE-MODE READ-WRITE CYCLE
(LATE WRITE and READ-MODIFY-WRITE CYCLES)
t
RASC
RAS
V
IH
V
IL
t
RP
t
CSH
t
CRP
CASL ,CAS H
V
IH
V
IL
t
RC D
t
CA S ,
t
C LC H
t
CP
t
PCM
t
CAS,
t
CLCH
t
RSH
t
CP
t
C AS ,
t
C L C H
t
CP
t
AR
t
R AD
t
ASR
ADDR
V
IH
V
IL
t
RAH
t
AS C
t
C AH
t
AS C
t
C A H
C OL UM N
t
ASC
t
RAL
t
CAH
ROW
ROW
C OL UM N
COLUM N
t
RWD
t
RCS
t
CWL
t
WP
t
CWL
t
WP
t
AWD
t
CWD
t
RWL
t
CWL
t
A WD
t
CW D
t
WP
t
AWD
t
CWD
WE
V
IH
V
IL
t
AA
t
R AC
t
C AC
t
CL
Z
t
AA
t
DH
t
DS
t
ACP
t
C AC
t
CLZ
V A L I D VA L I D
D
OUT
D
I N
VALI D VAL ID
D
OUT
D
IN
t
AA
t
DH
t
DS
t
DH
t
AC P
t
C AC
t
CLZ
VALI D
D
OUT
VA L I D
D
IN
t
DS
I/ O
V
I /O H
V
I /O L
t
OFF2
t
O AC
OE
V
IH
V
IL
t
OFF2
t
O AC
t
O AC
t
OFF 2
t
OEH
DON'T CARE
UNDEFINED
Note : 1. t
PC
can be measured from falling edge to falling edge of
CAS
, or from rising edge to rising edge of
CAS
. Both
measurements must meet the t
PC
specification.
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2001
Revision
:
1.3
10/16
