M11L16161SA-50T
| Model | M11L16161SA-50T |
| Description | EDO DRAM, 1MX16, 50ns, CMOS, PDSO44, TSOP2-50/44 |
| PDF file | Total 16 pages (File size: 203K) |
| Chip Manufacturer | ESMT |
$ %
(Continued)
-45
PARAMETER
Read Command Setup Time
Read Command Hold Time Reference to
CAS
Read Command Hold Time Reference to
RAS
CAS
to Output in Low-Z
M11B16161A / M11B16161SA
M11L16161A / M11L16161SA
-50
MIN
MAX
-60
MIN
MAX
UNIT
Notes
SYMBOL
t
RCS
t
RCH
t
RRH
t
CLZ
t
OFF1
t
OFF2
t
WCS
t
WCH
t
WCR
t
WP
t
RWL
t
CWL
t
DS
t
DH
t
DHR
t
RWD
t
AWD
t
CWD
t
T
t
REF
t
REF
t
RPC
t
CSR
t
CHR
t
OEH
t
OES
t
OEHC
t
OEP
t
ORD
t
CLCH
t
COH
t
WHZ
t
RASS
t
RPS
t
CHS
t
RSR
t
RHR
MIN
MAX
0
0
0
0
0
0
0
6
40
6
11
6
0
6
40
57
34
23
1
50
16
64
11
11
0
0
0
0
0
0
0
7
44
7
13
7
0
7
44
67
42
30
1
50
16
64
13
13
0
0
0
0
0
0
0
10
55
10
15
10
0
10
55
79
49
34
1
50
16
64
15
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
ns
us
ns
ns
ns
ns
15,18
9,15,19
9
20
10,17,20
17,26
11,15,18
15,25
15
15
15
15,19
12,20
12,20
11
11
11,18
2,3
Output Buffer Turn-off Delay From
CAS
or
RAS
Output Buffer Turn-off to
OE
Write Command Setup Time
Write Command Hold Time
Write Command Hold Time(Reference to
RAS
)
Write Command Pulse Width
Write Command to
RAS
Lead Time
Write Command to
CAS
Lead Time
Data-in Setup Time
Data-in Hold Time
Data-in Hold Time (Reference to
RAS
)
RAS
to
WE
Delay Time
Column Address to
WE
Delay Time
CAS
to
WE
Delay Time
Transition Time (rise or fall)
Refresh Period (1024 cycles)
Refresh Period (1024 cycles) Self Refresh
RAS
to
CAS
Precharge Time
CAS
Setup Time(CBR REFRESH)
CAS
Hold Time(CBR REFRESH)
OE
Hold Time From
WE
During Read-Mode-Write
Cycle
OE
Low to
CAS
High Setup Time
OE
High Hold Time From
CAS
High
OE
Precharge Time
OE
Setup Prior to
RAS
During Hidden Refresh
Cycle
5
5
10
6
5
2
2
0
6
3
0
100
77
-50
0
6
11
5
5
10
7
5
2
2
0
7
3
0
100
84
-50
0
7
13
5
5
10
10
5
2
2
0
10
3
0
100
104
-50
0
10
1,18
1,19
16
Last
CAS
Going Low to First
CAS
Returning High
Data Output Hold After
CAS
Returning Low
Output Disable Delay From
WE
Self Refresh
RAS
Low Pulse width
Self Refresh
RAS
High Precharge Time
Self Refresh
CAS
Hold Time
Read Setup Time Reference to
RAS
in CBR/SR
Read Hold Time Reference to
RAS
in CBR/SR
21
27,28
27,28
27,28
27,28
27,28
Elite Semiconductor Memory Technology Inc.
Publication Date
:
May. 2001
Revision
:
1.3
5/16
