N04L163WC1C
| Model | N04L163WC1C |
| Description | 4Mb Ultra-Low Power Asynchronous CMOS SRAM |
| PDF file | Total 10 pages (File size: 263K) |
| Chip Manufacturer | ETC |
N04L163WC1C
NanoAmp Solutions, Inc.
Timing Test Conditions
Item
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
Operating Temperature
0.1V
CC
to 0.9 V
CC
1V/ns
0.5 V
CC
CL = 50pF
-40 to +85
o
C
Advance Information
Timing
Item
Read Cycle Time
Address Access Time
Chip Enable to Valid Output
Output Enable to Valid Output
Byte Select to Valid Output
Chip Enable to Low-Z output
Output Enable to Low-Z Output
Byte Select to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Byte Select Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Byte Select to End of Write
Write Pulse Width
Address Setup Time
Write Recovery Time
Write to High-Z Output
Data to Write Time Overlap
Data Hold from Write Time
End Write to Low-Z Output
Note:
1. Full device AC operation assumes a 100us ramp time from 0 to Vcc(min) and 200us wait time after Vcc stablization.
2. Full device operation requires linear Vcc ramp from V
DR
to Vcc(min)
≥
100us or stable at Vcc(min)
≥
100us.
Symbol
t
RC
t
AA
t
CO
t
OE
t
LB
, t
UB
t
LZ
t
OLZ
t
LBZ
, t
UBZ
t
HZ
t
OHZ
t
LBHZ
, t
UBHZ
t
OH
t
WC
t
CW
t
AW
t
LBW
, t
UBW
t
WP
t
AS
t
WR
t
WHZ
t
DW
t
DH
t
OW
-55
Min.
55
55
55
25
55
10
5
10
0
0
0
10
55
40
40
40
40
0
0
20
25
0
10
20
20
20
Max.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Stock No. 23373-C 1/05
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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