W144
| Model | W144 |
| Description | 440BX AGPset Spread Spectrum Frequency Synthesizer |
| PDF file | Total 14 pages (File size: 158K) |
| Chip Manufacturer | CYPRESS |
PRELIMINARY
PCI Clock Outputs, PCI_F and PCI1:5 (Lump Capacitance Test Load = 30 pF)
CPU = 66.6/100 MHz
Parameter
t
P
t
H
t
L
t
R
t
F
t
D
t
JC
Period
High Time
Low Time
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Jitter, Cycle-to-Cycle
Description
Test Condition/Comments
Measured on rising edge at 1.5V
Duration of clock cycle above 2.4V
Duration of clock cycle below 0.4V
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Measured on rising edge at 1.5V. Maximum
difference of cycle time between two adja-
cent cycles.
Measured on rising edge at 1.5V
Covers all CPU/PCI outputs. Measured on
rising edge at 1.5V. CPU leads PCI output.
1.5
Min.
30
12.0
12.0
1
1
45
4
4
55
250
Typ.
Max.
W144
Unit
ns
ns
ns
V/ns
V/ns
%
ps
t
SK
t
O
f
ST
Output Skew
CPU to PCI Clock Skew
500
4.0
3.0
ps
ns
ms
Frequency Stabilization
Assumes full supply voltage reached within
from Power-up (cold start) 1 ms from power-up. Short cycles exist pri-
or to frequency stabilization.
AC Output Impedance
Average value during switching transition.
Used for determining series termination
value.
30
Z
o
Ω
IOAPIC Clock Output (Lump Capacitance Test Load = 20 pF)
CPU = 66.6/100 MHz
Parameter
f
t
R
t
F
t
D
f
ST
Description
Frequency, Actual
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Test Condition/Comments
Frequency generated by crystal oscillator
Measured from 0.4V to 2.0V
Measured from 2.0V to 0.4V
Measured on rising and falling edge at 1.25V
1
1
45
Min.
Typ.
14.31818
4
4
55
1.5
Max.
Unit
MHz
V/ns
V/ns
%
ms
Frequency Stabilization
Assumes full supply voltage reached within
from Power-up (cold start) 1 ms from power-up. Short cycles exist prior
to frequency stabilization.
AC Output Impedance
Average value during switching transition.
Used for determining series termination value.
15
Z
o
Ω
REF0:1 Clock Output (Lump Capacitance Test Load = 20 pF)
CPU = 66.6/100 MHz
Parameter
f
t
R
t
F
t
D
f
ST
Description
Frequency, Actual
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Frequency Stabilization
from Power-up (cold
start)
AC Output Impedance
Test Condition/Comments
Frequency generated by crystal oscillator
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms from
power-up. Short cycles exist prior to frequency stabili-
zation.
Average value during switching transition. Used for de-
termining series termination value.
40
0.5
0.5
45
Min.
Typ.
14.318
2
2
55
3
Max.
Unit
MHz
V/ns
V/ns
%
ms
Z
o
Ω
12
