W19B320ATB7L
| Model | W19B320ATB7L |
| Description | Flash, 2MX16, 70ns, PBGA48, 6 X 8 MM, 0.80 MM PITCH, TFBGA-48 |
| PDF file | Total 53 pages (File size: 479K) |
| Chip Manufacturer | WINBOND |
W19B320AT/B
8.5 Read-Only Operations
PARAMETER
SYM.
TEST SETUP
70NS
MIN.
MAX.
UNIT
Read Cycle Time
Address to Output Delay
Chip Enable to Output Delay
Output Enable to Output Delay
Chip Enable to Output High Z
Output Enable to Output High Z
Output Hold Time From Address, #OE or
#CE, Whichever Occurs First
Read
Output Enable Hold Time Toggle and
#Data polling
Note:
Not 100 % tested
TRC
TACC
TCE
TOE
TDF
TDF
TOH
TOEH
#OE, #CE =VIL
#OE, = VIL
70
-
-
-
-
-
0
0
10
-
70
70
30
16
16
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
8.6 Hardware Reset (#RESET)
PARAMETER
SYM.
MIN.
MAX.
UNIT
#RESET
PIN
Low
(During
Algorithms) to Read Mode
Embedded
TReady
TReady
TRP
TRH
TRPD
TRB
-
-
500
50
20
0
20
500
-
-
-
-
μ
s
#RESET Pin Low (Not During Embedded
Algorithms) to Read Mode
#RESET Pulse Width
Reset High Time Before Read
#RESET Low to Standby Mode
RY/#BY Recovery Time
Note:
Not 100 % tested
ns
ns
ns
μ
s
ns
8.7 Word/Byte Configuration (#BYTE)
PARAMETER
SYM.
MIN.
70NS
MAX.
UNIT
#CE to #BYTE Switching Low or High
#BYTE Switching Low to Output High Z
#BYTE Switching High to Output Active
TELFL/TELFH
TFLQZ
TFHQV
-
-
70
5
16
-
ns
ns
ns
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Publication Release Date: December 27, 2005
Revision A4
