W19B320STB9G
| Model | W19B320STB9G |
| Description | Flash, 2MX16, 90ns, PBGA48, TFBGA-48 |
| PDF file | Total 52 pages (File size: 2M) |
| Chip Manufacturer | WINBOND |
W19B(L)320ST/B
8.4.8
Alternate #CE Controlled Erase and Program Operations
90 nS
PARAMETER
SYM.
MIN.
TYP.
(Note3)
MAX.
(Note4)
UNIT
Write Cycle Time (Note 1)
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Read Recover Time Before Write (#OE High to #WE
Low)
#WE Setup Time
#WE Hold Time
#CE Pulse Width
#CE Pulse Width High
Programming Time (Note 6)
Accelerated Programming Time (Note 6)
Sector Erase Time (Note 2)
Chip Erase Time (Note 2)
Chip Program Time (Note 5)
Notes:
T
WC
T
AS
T
AH
T
DS
T
DH
T
GHEL
T
WS
T
WH
T
CP
T
CPH
Byte
Word
Byte
Word
T
PB
T
PW
T
ACCP
T
SE
T
CE
Byte
Word
T
CPB
T
CPW
90
0
45
45
0
0
0
0
35
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
7
4
0.7
49
21
14
-
-
-
-
-
-
-
-
-
-
150
210
120
15
-
63
42
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
µS
Sec
Sec
Sec
1. Not 100 % tested.
2. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
3. Typical program and erase time assume the following conditions :25°C, 3.0 V V
DD
, 10,000 or 100,000
cycles .Additionally, programming typicals assume checkerboard pattern.
4. Under worst case conditions of 90°C, V
DD
= 2.7V for W19B320S or V
DD
= 3.0V for W19L320S, 10,000 or 100,000
cycles.
5. The typical chip programming time is considerably less than the maximun chip programming time listed,since most
bytes program faster than maximun program times listed.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command.
7. The device has a minimum erase and program cycle endurance of 10,000 or100,000 cycles.
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Publication Release Date: March 23, 2004
Revision A2
