X1286V14I
| Model | X1286V14I |
| Description | Intersil Real Time Clock/Calendar/CPU Supervisor with EEPROM X1286 |
| PDF file | Total 25 pages (File size: 362K) |
| Chip Manufacturer | INTERSIL |
X1286
Figure 8. Byte Write Sequence
Signals from
the Master
S
t
a
r
t
1
S
t
o
p
Slave
Address
1 110
A
C
K
Word
Address 1
0
A
C
K
Word
Address 0
Data
SDA Bus
Signals From
The Slave
A
C
K
A
C
K
Figure 9. Writing
30
bytes to a
128-byte
memory page starting at address
105.
7 Bytes
23 Bytes
Address
=6
Address Pointer
Ends Here
Addr = 7
Address
105
Address
127
Figure 10. Page Write Sequence
S
t
a
r
t
1
≤
n
≤
128 for EEPROM array
1
≤
n
≤
8 for CCR
Slave
Address
Word
Address 1
Word
Address 0
Data
(1)
Data
(n)
S
t
o
p
Signals from
the Master
SDA Bus
1
1 1 10
A
C
K
0
A
C
K
A
C
K
A
C
K
Signals from
the Slave
17
FN8101.0
March 29, 2005
Related PDFs
| Model | Description | Manufacturer | Operation |
|---|---|---|---|
 X1286V14I-T1
|
1 TIMER(S), REAL TIME CLOCK, PDSO14, 4.40 MM, PLASTIC, TSSOP-14 | RENESAS | Preview |
