Z0538001PSC
| Model | Z0538001PSC |
| Description | SMALL COMPUTER SYSTEM INTERFACE (SCSI) |
| PDF file | Total 37 pages (File size: 242K) |
| Chip Manufacturer | ZILOG |
Z
ILOG
/DB4
/DB5
/DB6
/DB7
N/C
Z5380 SCSI
D0
D1
D2
D3
D4
D0
/DB7
/DB6
/DB5
/DB4
/DB3
/DB2
/DB1
/DB0
/DBP
GND
/SEL
/BSY
/ACK
/ATN
/RST
I//O
C//D
/MSG
/REQ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
D1
D2
D3
D4
D5
D6
D7
A2
A1
VDD
A0
/IOW
/RESET
/EOP
/DACK
/DB3
/DB2
/DB1
/DB0
/DBP
GND
GND
/SEL
/BSY
/ACK
/ATN
7
8
9
10
11
12
13
14
15
16
6
5
4
3
2
1 44 43 42 41 40
39
38
37
36
D6
D7
A2
A1
VDD
N/C
A0
/IOW
/RESET
/EOP
/DACK
D5
Z5380
35
34
33
32
31
30
Z5380
31
30
29
28
27
26
25
24
23
22
21
17
29
18 19 20 21 22 23 24 25 26 27 28
/CS
/REQ
/RST
/MSG
DRQ
/IOR
I//O
C//D
IRQ
N/C
RDY
READY
/IOR
IRQ
DRQ
/CS
Figure 3b. 44-Pin PLCC Pin Configuration
Figure 3a. 40-Pin DIP Pin Configuration
PIN DESCRIPTION
Microprocessor Bus
Figure 3 shows the pins and their respective functions for
both the DIP and PLCC.
A2-A0
Address Lines
(Input). Address lines are used with
/CS, /IOR, or /IOW to address all internal registers.
/CS
Chip Select
(Input, Active Low). This signal, in con-
junction with /IOR or /IOW, enables the internal register
selected by A2-A0, to be read from or written to.
/DACK
DMA Acknowledge
(Input, Active Low). /DACK
resets DRQ and selects the data register for input or output
data transfers. /DACK is used by DMA controller instead of
/CS.
DRQ
DMA Request
(Output, Active High). DRQ indicates
that the data register is ready to be read or written. DRQ is
asserted only if DMA mode is set in the Command Regis-
ter. DRQ is cleared by /DACK.
D7-D0
Data Lines
(Bi-directional, three-state, Active High).
Bi-directional microprocessor data bus lines. D0 is the
Least Significant Bit of the bus. Data bus lines carry data
and commands to and from the SCSI.
/EOP
End of Process
(Input, Active Low). /EOP is used to
terminate a DMA transfer. If asserted during a DMA cycle,
the current byte will be transferred, but no additional bytes
will be requested.
/IOR
I/O Read
(Input, Active Low). /IOR is used in conjunc-
tion with /CS and A2-A0 to read an internal register. It also
selects the Input Data Register when used with /DACK.
/IOW
I/O Write
(Input, Active Low). /IOW is used in conjunc-
tion with /CS and A2-A0 to write an internal register. It also
selects the Output Data Register when used with /DACK.
PS97SCC0100
PS009101-0201
3
