Design of a Programmable Delay Fast Front Outer Triggering Pulse Source with High Accuracy (Fig.)

design principle
With the rapid development of various high and new frontier technologies, the fast frontier pulse source with fixed delay time in traditional design can no longer meet the needs, and it is often necessary to set the delay time arbitrarily within a certain range. Generally speaking, there are two ways to design a regular design. One is to combine several fixed delay pulse generation circuit units with different delay times into a programmable circuit. The fast-edge pulse output with different delay times can be obtained by computer control, but it is difficult to achieve high accuracy delay time, good fast-edge characteristics and high consistency of pulse shape. The main reason is that the contact resistance is a random parameter at the access points of multiple fixed delay unit circuits, whether electronic or mechanical, and the parameter is also affected by the environment around the circuit, resulting in a large random error in the output pulse front and delay time and is difficult to eliminate. In addition, the circuit designed by this method is complex and bulky. The second is to make a pulse generation circuit with a long delay time, which elicits signals with different delay time at different delay time parts of the circuit. Then, according to the user's needs, the computer connects the pulse with the required delay time to the subsequent output amplifier circuit to obtain the desired signal. This design method still has the same problems as the previous one, and has higher requirements for the process. The circuit of the traditional method is composed of separating elements and manufactured by traditional process. It is very difficult to obtain nanosecond delay time pulse.

The DS1023S programmable delay line chip of DALLAS has not only the various performance of fast-edge pulse delay circuit with long delay, but also the characteristics of communication with computer and receiving control. With this chip, a programmable fast-edge delay signal source with high accuracy can be designed.

System Principle and Composition
This pulse signal source is mainly composed of three parts: nanosecond delay pulse generation amplification output circuit, microsecond delay pulse generation amplification output circuit and system control circuit. The nanosecond delay pulse generation amplification output circuit and the microsecond delay pulse generation amplification output circuit are two completely independent circuits which can be used simultaneously. The nanosecond and microsecond delay times can be set by the keyboard and displayed on their respective monitors. The high accuracy programmable delay fast front pulse source schematic diagram is shown in Figure 1.

　　Nanosecond delay pulse generation amplifier output circuit
The output circuit of nanosecond delay pulse generation amplification consists of trigger pulse reshaping circuit, nanosecond reference and delay pulse forming circuit, and reference and delay pulse output amplification circuit.
The trigger pulse reshaping circuit completes the reshaping lock on the (+(5-25) V pulse signal sent from the external trigger input, forming an input end with a certain front and width of regular pulses sent into the nanosecond reference and delay pulse forming circuit. The principle is shown in Figure 2.
The nanosecond reference and delay pulse forming circuit generates a reference pulse and a delay pulse with a delay time of 1 ns stepping from 0 to 250ns, consisting of DS1023S. DS1023S is an 8-bit programmable delay chip. The delay time can be programmed and controlled by the computer in parallel or serial mode. Because the system control is relatively simple, the single-chip computer 97C2051 with strong real-time function is selected as the central processor of the system. The interface between DS1023S and 97C2051 single-chip computer is shown in Figure 3. In order to obtain a high accuracy delay, the delay reference output function provided by DS1023S can be used to minimize the significant change in measurement delay time between input and output due to the change in transition time when the input signal level changes, while eliminating the adverse effects caused by the change in operating temperature factor when the zero step delay occurs. DS1023-100 is set up to work in parallel programming mode. The required setup data is sent 74HC573 latch by bus driver 74HC244 and output to the parallel input of DS1023S, which delays the input pulse based on the data of the parallel input. The REF/PWM and OUT/OUT ends of DS1023S generate nanosecond reference output pulses and nanosecond delay output pulses respectively, which are driven by a backward output amplifier circuit.

The reference pulse and delay pulse output amplifier circuit is a pulse amplifier coupled with a pulse transformer. It mainly completes the function of reshaping and amplifying the reference pulse and delay pulse. The circuit is shown in Figure 4. After the reference and delay pulses generated by the front pulse generation circuit are reshaped and amplified by the circuit, one pulse with an amplitude of 25V, a pulse width of 200ns and a rise time of 4.5ns is output respectively.

　　Microsecond Reference and Delay Pulse Generation Amplification Output Circuit
The microsecond reference and delay pulse generation amplification output circuit mainly consists of trigger pulse reshaping circuit, reference pulse generation circuit, 10MHz clock generator, delay pulse generation circuit, reference pulse and delay pulse amplification output circuit. Delay time can range from 0 to 999 μ Set in s range with minimum step of 1 μ S, see Fig. 5 for principle.

The trigger pulse reshaping circuit is the same as the nanosecond trigger pulse reshaping circuit.

The reference pulse generation circuit consists of a D trigger. When the trigger pulse arrives, it directly generates the required reference pulse, which acts as the trigger signal of the delay pulse generation circuit as well as the reference pulse signal.





The 10MHz clock generator is designed to provide a delay time of 1 for the delay pulse generation circuit μ S Designed for standard clocks.

The delay pulse generation circuit consists of three T4016 programmable decimal counters. The counter starts counting when the reference pulse used as the trigger signal arrives. Counter with standard 1 μ S Clock as the unit of count. When the count is finished, a delay pulse is generated immediately. The delay time of microsecond delay pulse is set by writing the count value to the programmable three decimal counter circuit by the system control circuit. The programmable decimal counter is connected to the system interface as shown in Figure 6.

The reference pulse and delay pulse amplification circuit consists mainly of a secondary pulse amplifier and a follower. After further reshaping and amplification of the reference and delay pulses, the rise time is 2. μ S, amplitude 25V, width 200 μ Technical specifications of S.

　　System Control Circuit
The system control circuit mainly consists of single-chip computer 97C2051, bus driver 74HC244, data latch 74HC273, 74HC573 and 6 7-segment LED monitors to complete the functions of setting up and displaying delayed data. Data transfer and data processing are done by the control software.

System Control Software
The system control software consists of main program, keyboard scanner, display program, delay time compensation program, etc. The main program flowchart is shown in Figure 7.

The main program completes the initialization and resource allocation of the system, as well as the invocation of subprograms; The keyboard scanning subprogram generates the keyboard scanning signal and performs key value recognition calculation. Display the loop display of the subroutine completion delay value; The delay time compensation subprogram is mainly for nanosecond reference and delay pulse, and compensates for zero delay according to the result of system hardware debugging to further improve the accuracy of delay time.

Concluding remarks
Because the advanced programmable delay chip is used in this system, the circuit structure is simple, the delay time can be set arbitrarily, the delay accuracy is high, and the anti-jamming ability is strong. In addition, because the single-chip computer is used as the control part, the instrument is easy to operate and easy to expand.