Video Acquisition System Based on Image Sensor MT9M111

In recent years, with the rapid development of SoC technology, SoC image sensor appears in the field of image acquisition and processing. It integrates CMOS sensor and graphics processor functions, and can obtain very satisfactory image quality. The video acquisition system designed in this paper uses SoC imaging chip MT9M111 and USB2.0 interface chip CY7C68013.

System Structure

The schematic diagram of the system is shown in Fig. 1. When the image sensor starts to work, the collected data is stored in SRAM1 through the control logic of the GA first. SRAM1 enters the end-of-write state after the collection/storage process of a frame of image ends. At this time, SRAM1 switches and SRAM2 continues to store the collected data. At the same time, SRAM1 is in a readable state, controlled by the control logic in the GA, and the data in SRAM1 is transferred to the USB chip. Then transferred to the host computer, the system uses double SRAM structure and ping-pong mechanism, two pieces of memory work alternately, so that image acquisition and transmission are carried out in parallel. The dual-frame memory structure not only improves the speed of the system, but also because the algorithms for image processing in the field-bus mostly require large storage space, the two large-capacity SRAMs can act as external caches when implementing the algorithms.

MT9M111

This system uses the SOC product MT9M111 introduced by Meiguang Company, which integrates CMOS sensors and graphics processors. MT9M111 is a low-power, low-cost progressive scan CMOS image sensor. 1.3 megapixel resolution (1280H) × 1024V; 1/3 inch optical format; Full resolution 15fps consumes 170mW, VGA resolution 30fps 90mW, MT9M111 uses low leakage DRAM technology, equipped with beautiful DigitalilClraity technology to provide clear and bright color images even in the worst lighting conditions. MT9M111 has this low dark current and reduces chroma/brightness interference and instantaneous noise. The embedded programmable image stream processor of MT9M111 provides functions such as color recovery and repair, auto-exposure, white balance, lens shadow correction, increased sharpness, programmable gray correction, dark level misalignment correction, flicker avoidance, continuous adjustment of filter size, smooth digital zoom, fast auto-exposure mode, and non-working defect correction. In addition, it is equipped with two-line serial interfaces through which USB chips can be configured.

IS61WV20488

The main SRAM parameters related to image processing are the reading and writing speed and capacity of SRAM. In terms of capacity, the resolution of image collected by this system is 1280. × 1024, data width 8 bits, 2M × 8bit SRAM can satisfy the requirement of storing one frame of image data. Generally, the reading and writing speed of SRAM is 12ns, 15ns, 20ns or slower. Because the reading and writing speed of SRAM directly affects the clock of the whole image processing system, the faster the writing speed of SCAM, the better. This system uses IS61WV20488 of ISSI Company with a chip capacity of 2M × 8bit.

CY7C68013

The image data transmission part uses the interface chip CY7C68013, which is specially designed for USB2.0 by Cypress. The chip includes an enhanced 8051 processor with 815kB of RAM (compatible with the standard 8051 series, 3-5 times faster), 4kB FIFO memory and universal programmable interface I2C bus, Serial Interface Engine (SIE), and USB 2.0 transceiver.

System Software/Hardware Design

The software/hardware design of the system consists of three parts: image acquisition/storage module, image transmission module and USB driver/host application module.

Image Acquisition/Storage Module

The module mainly consists of the control logic of the GA to transfer the image data collected by the imaging chip MT9M111 to SRAM in real time. In the system, a dual-frame memory structure is used, each composed of an IS61WV20488 SRAM, which can store a frame of 1280. × 1024 resolution image data. Because of the ping-pong mechanism, the two memories work alternately, so that the collection and transmission of images proceed in parallel. In order to ensure that only one SRAM can read the collected image data at any time, a read mutex is set. Similarly, only one SRAM can receive the collected image data. Therefore, a write mutex is set up, which needs to be noted. Because the image data output speed of the image sensor is slower than that of USB2.0, after reading the data of SRAM2, you need to wait for another SRAM1 to finish writing the image data before you can write the next image data to SRAM2. SRAM1 can read the image data directly without waiting, so it can work in parallel and effectively improve the efficiency of the system.

Figure 2 shows the schematic diagram of the system control circuit. Each module in the internal part of the GA is written in Verilog HDL.

Image Transfer Module

After collecting a frame of image, the image data in the external RAM will be read into the host computer through the USB clock signal control module. In this image collection system, using the Slave FIFO asynchronous working mode of CY7C68013, the FIFO is configured to connect to the EP2 port, 1024 bytes per packet, 4 buffers per packet, block transfer mode, which can meet the system requirements. It also effectively uses the internal 4kB FIFO to transmit the collected image data. The system control uses the FALGB pin to report the "FIFO full" status, which is valid at low level by default. This paper uses an automatic input method. When a certain amount of data in FIFO is full, EZ-USB-FX2 transmits data directly to the USB transceiver through FIFO without CPU intervention, which improves the transmission speed. This system starts sending automatically when FIFO is full of 1KB.

USB Driver and Host Application Module

The development of USB device driver is a difficult point in the development of USB system. Especially when the system has a large amount of data and high speed requirements, it is necessary to write an efficient USB device driver to ensure the real-time transmission of high-resolution images. This system uses DDK to develop WDM driver. In fact, the USB client driver contains a large number of routines, which is very helpful to develop the driver.

The main function of host application is to read image data through USB interface and display dynamic image in real time. To improve the efficiency of host application, dual threads can be used.

epilogue

The system uses MT9M111, an image sensor with 1.3 megapixels, to ensure image quality, and CY7C68013, a USB 2.0 interface chip, to ensure real-time image transmission, and to provide software/hardware support for various image processing algorithms.

Reference:

[1].MT9M111datasheethttp://www.dzsc.com/datasheet/MT9M111_491466.html.
[2].CY7C68013 Datasheethttp://www.dzsc.com/datasheet/CY7C68013_1054335.html.
[3]. VGAdatasheethttp://www.dzsc.com/datasheet/VGA_2568786.html.
[4].12nsdatasheethttp://www.dzsc.com/datasheet/12ns_2105238.html.