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Home > Technical Information > Automotive Electronics/Intelligent Driving > Clever Use of Digital Phase Lock Loop 4046 to Measure Vehicle Speed

Clever Use of Digital Phase Lock Loop 4046 to Measure Vehicle Speed

Source:txpg2001
Category:Automotive Electronics/Intelligent Driving
2023-05-30 08:19:15
34
1 Preface

Phase-locked loops were born in the 1930s. In recent years, phase-locked technology has become one of the basic components of electronic devices in the fields of communication, space, measurement, TV, atomic energy, motor control, etc. It can extract signals, track and synchronize signals with high performance. Modem and demodulate analog and digital communication, frequency synthesis, filter and so on. To facilitate adjustment, reduce costs and improve reliability, there are a variety of integrated phase-locked loop circuits with different performance, mainly analog and digital.

The digital phase-locked chip 4046 is simple in structure, convenient in connection and easy to expand in function, and has been widely used in the design of audio generator, phase detection, frequency synthesis, voltage-frequency conversion, etc. This paper uses the principle of phase-locked and voltage-controlled oscillation of 4046, combines the frequency division function of the counter, and measures the speed of different cylinder cars by counting and decoding display.

Functions of 2 Digital Phase Lock Loop 4046 and its application in this design

Introduction of 2.1 Digital Phase Lock Loop 4046 Function

The Digital Phase Lock Loop 4046 consists of two phase comparators, a Voltage Controlled Oscillator (VCO), a source follower and a Zener diode. The comparator has two common signal inputs, one is the input letter

For large value signals, it can be directly coupled to the comparator input. For small amplitude signals, it can be coupled to the amplifier by capacitance, and then sent to the signal input.

Phase comparator 1 is a gate or gate that generates a phase difference signal (phase comparator 1 output) and maintains a 90 degree phase shift at the output signal center frequency of the VCO. As long as the phase difference between the input and comparison signals (duty cycles are 50%) remains constant, the central frequency of the output signal of the VCO tracks the frequency of the input signal, which is also the essence of phase-locked loop.

Phase Comparator 2 is an edge-triggered digital storage network that generates a phase difference signal (phase comparator 2 output) and a lock signal (phase pulse output) with a 0 degree phase shift at the central frequency of the output signal of the VCO. As long as the phase difference between the input signal and the comparison signal (independent of duty cycle) remains constant, the central frequency of the output signal of the VCO tracks the frequency of the input signal.

The signal generated by the voltage controlled oscillator (VCO) is output from the VCO OUT. The oscillation frequency is determined by the input signal of the VCO IN, the capacitance between the 6 and 7 pins, and the resistance connected to the 11 and 12 pins. When the peripheral parameters are determined, the magnitude of the oscillation frequency is linearly related to the input signal of the VCO.

The source follower is grounded by an external resistance of more than 10 K. When the INHIBIT input signal is at high level, the voltage controlled oscillator and source follower are shielded to reduce power consumption. Ziner diode mainly acts as a voltage regulator.

The 4046 has the following main features:

(1) Wider power supply voltage range (3.0-18V);
(2) Low power consumption (70) μ A);
(3) High and stable oscillation frequency (1.3MHz);
(4) Small frequency temperature drift;
(5) Good linearity of VCO output (< 1%).

Application of 2.2 Digital Phase Lock Loop 4046 in this design

In this design, the sensor collects the spark signal in the automobile ignition system, which is sent to the same-phase input of the voltage comparator through clipping, filtering and stabilization. The output signal is rectangular pulse, and the high-level is the power voltage value of the operational amplifier. The processed signal is sent to the input signal port of Digital Phase Lock Loop 4046. The second phase comparator of 4046 is used. When the phase difference between the output signal (4 pins) and the input signal is constant, the output signal frequency is an integer multiple of the input signal frequency. The frequency depends on the voltage of the phase comparator output signal after low-pass filtering, the capacitance between the 6 and 7 pins, and the external resistance on the 11 and 12 pins.

3 Design Circuit Implementation of Measuring Vehicle Speed

For 4-cylinder, 6-cylinder and 8-cylinder automotive engines, different frequency divisions are needed for the output signal of 4046 in order to obtain a uniform speed calculation formula. For 4-cylinder car engine, the output signal of 4046 passes through 6-frequency, for 6-cylinder car engine, the output signal of 4046 passes through 4-frequency, and for 8-cylinder car engine, the output signal of 4046 passes through 3-frequency. The counter has frequency dividing function. CMOS chip 4018 with variable counter function is selected in this design. As long as the 6 pins of the 4018 chip are connected to the DATA end of the 1 pin, a 6-bit counter is formed to divide the input clock signal into 6 frequencies. As long as the 4 pins of the 4018 chip are connected to the DATA end of the 1 pin, a quaternary counter is formed to divide the input clock signal into 4 frequencies. The fourth and fifth pins are connected by phase and then connected to the DATA end of the first pin, which constitutes a ternary counter to divide the input clock signal into three frequencies. A multi-way switch can be used to measure the speed of different cylinder cars.  


The output signal of 4046 is counted by a counter, and after data is locked, it is sent to the decoding circuit. The decoding output drives a common cathode light-emitting diode to display the measurement result directly.

The whole measurement system can be represented by the following schematic block diagram.


Simulation of 4 Key Design Links

The key links of this design are the phase-locked and voltage-controlled oscillation functions of the digital phase-locked loop 4046 and the frequency division function of the variable counter 4018. The circuit design and layout software Protel 99 contains a powerful analog/digital mixed signal simulator, which can perform transient analysis and display the waveforms of the circuit nodes to verify the feasibility of the design. The function of 4018 and 4046 can be analyzed by using the simulation function of this software and its application in this design.

Simulation of frequency division function of 4.1 4018

Implementation of 4.1.16 crossover

From the above analysis, as long as the 6 pins output of 4018 are connected to the DATA end of the 1 pin, 4018 becomes a hexadecimal counter, and the circuit connection is shown in Figure 3.

Adding a frequency of 1M to the CLK end of 4018 clock during simulation

The square wave signal of Hz, the input signal Ui and the output signal Uo are observed. The waveform is shown in Figure 4. The frequency of the two signals is measured by the cursor with the software. The frequency of Ui is six times that of Uo, and the six-part frequency of the input signal is successfully achieved with 4018.

Implementation of 4.1.24 and 3-way crossover

As long as the 4 pins of the 4018 chip are connected to the 1 pin DATA end, the input clock signal can be divided into 4 frequencies, the 4 and 5 pins are connected to each other and then to the 1 pin DATA end, the input clock signal can be divided into 3 frequencies, and the corresponding circuit connection diagram and simulation waveforms are not described in detail.


Simulation of Phase Lock Function and Voltage Controlled Oscillation Function of 4.2 4046

Simulation of Phase Lock Function of 4.2.1 4046



There are two phase comparators inside 4046. In this design, phase comparator 2 is used to phase compare the signal of signal input (14 pins) with the signal of comparison input (3 pins). The phase difference is converted to the output of pulse signal. This signal is filtered by low-pass filter and used as the input signal of VCO. As long as the signal phase difference between 14 pins and 3 pins is constant, the input signal of VCO is fixed. The output signal frequency of the VCO is a multiple of the signal frequency of the 14 pins. The actual circuit connection diagram is shown in Figure 5.

In Fig. 5, the signal collected and preprocessed by the sensor is input from the signal input (14 pins). The output signal of the VCO (4 pins) is fed back to the input of the comparative signal (3 pins) after 4018 crossover. The phase-discriminated signal is output from the phase comparator 2 (13 pins). The signal is sent to the input of the VCO (9 pins) after low-pass filtering. The output signal frequency is determined by the voltage controlled oscillator input signal and the capacitance C1 between the 6 and 7 pins and the resistance R1 and R2 on the 11 and 12 pins.

When simulating the phase-locked function of 4046, the input frequency from 14 pins is 60Hz, the high level is the power voltage (10V), the duty-cycle ratio is 1/4 rectangular wave signal, the input frequency from 3 pins is 60Hz, the high level is the power voltage (10V), and the duty-cycle ratio is 1/2 rectangular wave signal. The phase difference between them is constant. The signal output from phase comparator 2 is filtered to become a DC signal and sent to the input of the voltage-controlled oscillator. The corresponding simulated waveform is shown in Figure 6.

As can be seen from the figure above, when the phase difference between the input signal and the comparison signal is constant, the phase-discriminated signal is transformed into a DC signal after low-pass filtering, which controls the output signal frequency of the VCO.

Simulation of 4.2.2 4046 Voltage Controlled Oscillation Function


When the peripheral parameters are determined, the output signal frequency of the 4046 VCO depends on the DC signal size at the VCO IN end. Observe the output signal waveform by setting different input DC signal voltage. The circuit connection diagram used is shown in Figure 7.

Add 1.0-7.0V DC voltage to the VCO IN end to observe the output signal waveform of the VCO OUT end, and the resulting waveform is shown in Figure 8.

By measuring the period of each output signal with the cursor and converting it to frequency, the relation between the waveform frequency and the input DC voltage is shown in Table 1.

From the above waveform display and measurement data, it can be concluded that the output signal frequency of the VCO has a good linear relationship with the input voltage, and the output signal frequency is beyond the audio range.

5. Concluding remarks

This design uses the phase-lock and voltage-controlled oscillation functions of the digital phase-lock chip to generate high frequency oscillation, drive variable counter to do different frequency division, and display the measurement result after counting and decoding the signal that is proportional to the speed of the car. With reasonable sensor to collect signal, it can be used to measure the speed of cars with different cylinders, which has a certain practical value and application prospects.



Source:Xiang Xueqin